Volume 23, Number 1, January-February 2006

• 
  Kwang-Ting Cheng: New beginnings, continued success. 5-6

• 
  Bernhard Peischl, Franz Wotawa: Automated Source-Level Error Localization in Hardware Designs. 8-19
• 
  Hamilton Klimach, Carlos Galup-Montoro, Márcio C. Schneider, Alfredo Arnaud: MOSFET Mismatch Modeling: A New Approach. 20-29
• 
  Kevin Lucas, Chi-Min Yuan, Robert Boone, Karl Wimmer, Kirk Strozewski, Olivier Toublan: Logic Design for Printability Using OPC Methods. 30-37
• 
  Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante: Early, Accurate Dependability Analysis of CAN-Based Networked Systems. 38-45
• 
  David C. Keezer, Dany Minier, Patrice Ducharme: Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. 46-57
• 
  Antonio Petraglia, Jorge M. Cañive, Mariane R. Petraglia: Efficient Parametric Fault Detection in Switched-Capacitor Filters. 58-66

• 
  Scott Davidson: Searching for clues: Diagnosing IC failures. 67-68
• 
  Christopher Songer: Embedded systems and the kitchen sink. 69-70

• 
  Ken Butler: Conference Reports: 2005 International Test Conference. 71
• 
  TTTC Newsletter. 76-77
• 
  DATC Newsletter. 78

• 
  Scott Davidson: All about getting it. 80

Volume 23, Number 2, March-April 2006

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  Kwang-Ting (Tim) Cheng: Dealing with early life failures. 85

• 
  Phil Nigh: Guest Editor's Introduction: Evolving Methods for Detecting and Handling Reliability Defects. 86-87
• 
  Mohd Fairuz Zakaria, Zainal Abu Kassim, Melanie Po-Leen Ooi, Serge N. Demidenko: Reducing Burn-in Time through High-Voltage Stress Test and Weibull Statistical Analysis. 88-98
• 
  Ritesh P. Turakhia, W. Robert Daasch, Joel Lurkins, Brady Benware: Changing Test and Data Modeling Requirements for Screening Latent Defects as Statistical Outliers. 100-109
• 
  Thomas S. Barnett, Matt Grady, Kathleen G. Purdy, Adit D. Singh: Combining Negative Binomial and Weibull Distributions for Yield and Reliability Prediction. 110-116
• 
  John M. Carulli Jr., Thomas J. Anderson: The Impact of Multiple Failure Modes on Estimating Product Field Reliability. 118-126

• 
  Kaushik Roy, T. M. Mak, Kwang-Ting (Tim) Cheng: Test Consideration for Nanometer-Scale CMOS Circuits. 128-136
• 
  Selahattin Sayil: Optical Contactless Probing: An All-Silicon, Fully Optical Approach. 138-146
• 
  Jérôme Chevalier, Maxime de Nanclas, Luc Filion, Olivier Benny, Mathieu Rondonneau, Guy Bois, El Mostapha Aboulhamid: A SystemC Refinement Methodology for Embedded Software. 148-158

• 
  Brian Bailey: Was it worth the wait? Yes! 160-161
• 
  Scott Davidson: An insider's look at microprocessor design. 162-163

• 
  Carol Stolicny: ITC 2005 panels. 164-166
• 
  Sandip Kundu: TTTC technical forum honoring Sudhakar M. Reddy. 167
• 
  Kartikeya Mayaram: CEDA Currents. 168-171
• 
  TTTC Newsletter. 175

• 
  Burnell West: Making more out of open-source tools. 176

Volume 23, Number 3, May-June 2006

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  Kwang-Ting (Tim) Cheng: The Need for a SiP Design and Test Infrastructure. 181

• 
  Sachin S. Sapatnekar, Grant Martin: DAC Highlights. 182-184

• 
  Fabian Vargas: 2006 Latin American Test Workshop. 185

• 
  Bruce C. Kim, Yervant Zorian: Guest Editors' Introduction: Big Innovations in Small Packages. 186-187
• 
  Peter Rickert, William Krenik: Cell Phone Integration: SiP, SoC, and PoP. 188-195
• 
  Thomas Brandtner: Chip-Package Codesign Flow for Mixed-Signal SiP Designs. 196-202
• 
  Davide Appello, Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda: System-in-Package Testing: Problems and Solutions. 203-211
• 
  Dong Gun Kam, Joungho Kim, Jiheon Yu, Ho Choi, Kicheol Bae, Choonheung Lee: Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array. 212-219
• 
  Vijay K. Madisetti: Electronic System, Platform, and Package Codesign. 220-233
• 
  Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, Michel Renovell: A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs. 234-243

• 
  Grant Martin: The First Transaction, but not the Last. 248-249

• 
  Bruce C. Kim: Test Technology Technical Council Newsletter. 250
• 
  CEDA Currents. 252-253

• 
  T. M. Mak: Is System in Package the Panacea for Integration? 256

Volume 23, Number 4, July-August 2006

• 
  Kwang-Ting (Tim) Cheng: Vision from the Top. 261

• 
  Mitra Subhasish, Ondrej Novák, Hana Kubatova, Bashir M. Al-Hashimi, Erik Jan Marinissen, C. P. Ravikumar: Conference Reports. 262-265

• 
  Alberto Valdes-Garcia, José Silva-Martínez, Edgar Sánchez-Sinencio: On-Chip Testing Techniques for RF Wireless Transceivers. 268-277
• 
  Jim Plusquellic, Dhruva Acharyya, Abhishek Singh, Mohammad Tehranipoor, Chintan Patel: Quiescent-Signal Analysis: A Multiple Supply Pad IDDQ Method. 278-293
• 
  Nur A. Touba: Survey of Test Vector Compression Techniques. 294-303
• 
  Walden C. Rhines: Sociology of Design and EDA. 304-310

• 
  Ajay Khoche: Panel Summaries: Real-Time Volume Diagnostics--Requirements and Challenges. 315
• 
  Victor Berman: Standards: The P1685 IP-XACT IP Metadata Standard. 316-317
• 
  Sachin S. Sapatnekar: Book Reviews: Plumbing the Depths of Leakage. 318-319
• 
  Bruce C. Kim: Test Technology TC Newsletter. 320-323
• 
  CEDA Currents. 322-325

• 
  Scott Davidson: Who Reads This Stuff Anyway? 328

Volume 23, Number 5, September-October 2006

• 
  Kwang-Ting (Tim) Cheng: The New World of ESL Design. 333

• 
  Sandeep K. Shukla, Carl Pixley, Gary Smith: Guest Editors' Introduction: The True State of the Art of ESL Design. 335-337
• 
  Patrick Schaumont, Ingrid Verbauwhede: A Component-Based Design Environment for ESL Design. 338-347
• 
  Ivan Radojevic, Zoran A. Salcic, Partha S. Roop: Modeling Embedded Systems: From SystemC and Esterel to DFCharts. 348-358
• 
  Douglas Densmore, Roberto Passerone: A Platform-Based Taxonomy for ESL Design. 359-374
• 
  Stephen A. Edwards: The Challenges of Synthesizing Hardware from C-Like Languages. 375-386

• 
  John Sanguinetti: A Different View: Hardware Synthesis from SystemC is a Maturing Technology. 387

• 
  Kenneth M. Butler: Guest Editor's Introduction: ITC Helps Get More Out of Test. 388-389
• 
  Jeffrey E. Nelson, Thomas Zanon, Jason G. Brown, Osei Poku, R. D. (Shawn) Blanton, Wojciech Maly, Brady Benware, Chris Schuermyer: Extracting Defect Density and Size Distributions from Product ICs. 390-400
• 
  Nisar Ahmed, Mohammad Tehranipoor: Improving Transition Delay Test Using a Hybrid Method. 402-412
• 
  Sebastiàn A. Bota, José Luis Rosselló, Carol de Benito, Ali Keshavarzi, Jaume Segura: Impact of Thermal Gradients on Clock Skew and Testing. 414-424

• 
  Bruce C. Kim: Test Technology TC Newsletter. 425
• 
  Scott Davidson: Book Reviews: A Comprehensive EDA Handbook. 426-427
• 
  Victor Berman: Standards: DASC sees moves toward formality in design. 428-429
• 
  CEDA Currents. 430-431

• 
  Anne E. Gattiker: Getting More out of ITC. 432

Volume 23, Number 6, November/December 2006

• 
  Kwang-Ting (Tim) Cheng: Handling variations and uncertainties. 434
• 
  T. M. Mak, Sani R. Nassif: Guest Editors' Introduction: Process Variation and Stochastic Design and Test. 436-437
• 
  Mehrdad Nourani, Arun Radhakrishnan: Testing On-Die Process Variation in Nanometer VLSI. 438-451
• 
  Sounil Biswas, Ronald D. Blanton: Statistical Test Compaction Using Binary Decision Trees. 452-462
• 
  Soumendu Bhattacharya, Abhijit Chatterjee: A DFT Approach for Testing Embedded Systems Using DC Sensors. 464-475
• 
  Eric S. Fetzer: Using Adaptive Circuits to Mitigate Process Variations in a Microprocessor Design. 476-483
• 
  Dennis Sylvester, David Blaauw, Eric Karl: ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon. 484-490
• 
  Grant Martin: Book Reviews: NoC, NoC ... Who's there? 500-501
• 
  Fabian Vargas: Design and test on chip for EMC. 502-503
• 
  Vladimir Hahanov: East-West Design & Test Workshop. 504-505
• 
  Bruce C. Kim: TTTC Newsletter. 507
• 
  Shekhar Borkar: Tackling variability and reliability challenges. 520

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