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L. Miguel Silveira
List of publications from the DBLP Bibliography Server - FAQ
| 2012 | ||
|---|---|---|
| 66 | Jorge Fernandez Villena, Luis Miguel Silveira: Exploiting Parallelism for Improved Automation of Multidimensional Model Order Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 31(1): 37-49 (2012) | |
| 2011 | ||
| 65 | Luís Guerra e Silva, Luis Miguel Silveira: Handling intra-die variations in PSTA. ACM Great Lakes Symposium on VLSI 2011: 403-406 | |
| 64 | Yu Bi, Kees-Jan van der Kolk, Jorge Fernandez Villena, Luis Miguel Silveira, Nick van der Meijs: Fast statistical analysis of RC nets subject to manufacturing variabilities. DATE 2011: 31-37 | |
| 63 | Jorge Fernandez Villena, L. Miguel Silveira: Positive realization of reduced RLCM nets. VLSI-SoC 2011: 398-403 | |
| 62 | Jorge Fernandez Villena, L. Miguel Silveira: Multi-Dimensional Automatic Sampling Schemes for Multi-Point Modeling Methodologies. IEEE Trans. on CAD of Integrated Circuits and Systems 30(8): 1141-1151 (2011) | |
| 2010 | ||
| 61 | Luís Guerra e Silva, Joel R. Phillips, L. Miguel Silveira: Speedpath analysis under parametric timing models. DAC 2010: 268-273 | |
| 60 | Zuochang Ye, L. Miguel Silveira, Joel R. Phillips: Extended Hamiltonian Pencil for passivity assessment and enforcement for S-parameter systems. DATE 2010: 1148-1152 | |
| 59 | Jorge Fernandez Villena, Luis Miguel Silveira: HORUS - high-dimensional Model Order Reduction via low moment-matching upgraded sampling. DATE 2010: 465-470 | |
| 58 | Jorge Fernandez Villena, Luis Miguel Silveira: 3POr - Parallel projection based parameterized order reduction for multi-dimensional linear models. ICCAD 2010: 536-542 | |
| 57 | Luís Guerra e Silva, Joel R. Phillips, Luis Miguel Silveira: Effective Corner-Based Techniques for Variation-Aware IC Timing Verification. IEEE Trans. on CAD of Integrated Circuits and Systems 29(1): 157-162 (2010) | |
| 56 | João M. S. Silva, Joel R. Phillips, Luis Miguel Silveira: Efficient Simulation of Power Grids. IEEE Trans. on CAD of Integrated Circuits and Systems 29(10): 1523-1532 (2010) | |
| 55 | Jorge Fernandez Villena, Luis Miguel Silveira: SPARE - A Scalable Algorithm for Passive, Structure Preserving, Parameter-Aware Model Order Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 29(6): 925-938 (2010) | |
| 2009 | ||
| 54 | Jorge Fernandez Villena, Luis Miguel Silveira: ARMS - automatic residue-minimization based sampling for multi-point modeling techniques. DAC 2009: 951-956 | |
| 53 | Jorge Fernandez Villena, Gabriela Ciuprina, Daniel Ioan, Luis Miguel Silveira: On the efficient reduction of complete EM based parametric models. DATE 2009: 1172-1177 | |
| 52 | Zuochang Ye, Luis Miguel Silveira, Joel R. Phillips: Fast and reliable passivity assessment and enforcement with extended Hamiltonian pencil. ICCAD 2009: 774-778 | |
| 51 | António Gusmão, L. Miguel Silveira, José C. Monteiro: Parameter tuning in SVM-based power macro-modeling. ISQED 2009: 135-140 | |
| 50 | António Gusmão, Luis Miguel Silveira, José Monteiro: Power Macro-Modeling Using an Iterative LS-SVM Method. VLSI-SoC 2009: 118-134 | |
| 49 | Pedro Marques Morgado, Paulo F. Flores, L. Miguel Silveira: Generating realistic stimuli for accurate power grid analysis. ACM Trans. Design Autom. Electr. Syst. 14(3): (2009) | |
| 48 | Luís Gil, Paulo F. Flores, Luis Miguel Silveira: PMSat: a parallel version of MiniSAT. JSAT 6(1-3): 71-98 (2009) | |
| 2008 | ||
| 47 | João M. S. Silva, Joel R. Phillips, Luis Miguel Silveira: Efficient Representation and Analysis of Power Grids. DATE 2008: 420-425 | |
| 46 | Jorge Fernandez Villena, Luis Miguel Silveira: SPARE - a Scalable algorithm for passive, structure preserving, Parameter-Aware model order REduction. DATE 2008: 586-591 | |
| 45 | Pedro Marques Morgado, Paulo F. Flores, José C. Monteiro, Luis Miguel Silveira: Generating Worst-Case Stimuli for Accurate Power Grid Analysis. PATMOS 2008: 247-257 | |
| 2007 | ||
| 44 | Luís Guerra e Silva, Luis Miguel Silveira, Joel R. Phillips: Efficient computation of the worst-delay corner. DATE 2007: 1617-1622 | |
| 43 | João M. S. Silva, L. Miguel Silveira: On the Effectiveness of Reducing Large Linear Networks with Many Ports. ISCAS 2007: 2694-2697 | |
| 42 | João M. S. Silva, L. Miguel Silveira: On the Compressibility of Power Grid Models. ISVLSI 2007: 186-191 | |
| 41 | Pedro Marques Morgado, Paulo F. Flores, L. Miguel Silveira: Generating Realistic Stimuli for Accurate Power Grid Analysis. ISVLSI 2007: 233-238 | |
| 40 | Jorge Fernandez Villena, Wil H. A. Schilders, L. Miguel Silveira: Parametric structure-preserving model order reduction. VLSI-SoC 2007: 31-36 | |
| 39 | João M. S. Silva, L. Miguel Silveira: Substrate model extraction using finite differences and parallel multigrid. Integration 40(4): 447-460 (2007) | |
| 2006 | ||
| 38 | Luís Guerra e Silva, Zhenhai Zhu, Joel R. Phillips, L. Miguel Silveira: Variation-Aware, Library Compatible Delay Modeling Strategy. VLSI-SoC 2006: 122-127 | |
| 37 | Luis Miguel Silveira, Joel R. Phillips: Resampling Plans for Sample Point Selection in Multipoint Model-Order Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2775-2783 (2006) | |
| 2005 | ||
| 36 | Luís Guerra e Silva, Luis Miguel Silveira: Grid-based statistical timing analysis. IADIS AC 2005: 73-80 | |
| 35 | João M. S. Silva, L. Miguel Silveira: Issues in Model Reduction of Power Grids. VLSI-SoC 2005: 127-144 | |
| 34 | Joel R. Phillips, Luis Miguel Silveira: Poor man's TBR: a simple model reduction scheme. IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 43-55 (2005) | |
| 2004 | ||
| 33 | Luis Miguel Silveira, Joel R. Phillips: Exploiting input information in a model reduction algorithm for massively coupled parasitic networks. DAC 2004: 385-388 | |
| 32 | Joel R. Phillips, Luis Miguel Silveira: Poor Man's TBR: A Simple Model Reduction Scheme. DATE 2004: 938-943 | |
| 31 | João M. S. Silva, Luis Miguel Silveira: Multigrid-based substrate coupling model extraction. ISCAS (5) 2004: 169-173 | |
| 30 | João M. S. Silva, L. Miguel Silveira: Issues in parallelizing multigrid-based substrate model extraction and analysis. SBCCI 2004: 123-128 | |
| 29 | José C. Costa, Luis Miguel Silveira, Srinivas Devadas, José Monteiro: Power Estimation Using Probability Polynomials. Design Autom. for Emb. Sys. 9(1): 19-52 (2004) | |
| 28 | Carlos P. Coelho, Joel R. Phillips, Luis Miguel Silveira: A convex programming approach for generating guaranteed passive approximations to tabulated frequency-data. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 293-301 (2004) | |
| 2003 | ||
| 27 | Joel R. Phillips, João Afonso, Arlindo L. Oliveira, Luis Miguel Silveira: Analog Macromodeling using Kernel Methods. ICCAD 2003: 446-453 | |
| 26 | João M. S. Silva, Luis Miguel Silveira: Dynamic Models for Substrate Coupling in Mixed-Mode Systems. VLSI-SOC 2003: 25-30 | |
| 25 | Joel R. Phillips, Luca Daniel, Luis Miguel Silveira: Guaranteed passive balancing transformations for model order reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 22(8): 1027-1041 (2003) | |
| 2002 | ||
| 24 | Joel R. Phillips, Luca Daniel, Luis Miguel Silveira: Guaranteed passive balancing transformations for model order reduction. DAC 2002: 52-57 | |
| 23 | Carlos P. Coelho, Luis Miguel Silveira, Joel R. Phillips: Passive Constrained Rational Approximation Algorithm Using Nevanlinna-Pick Interpolation. DATE 2002: 923-930 | |
| 22 | Carlos P. Coelho, Joel R. Phillips, Luis Miguel Silveira: Optimization based passive constrained fitting. ICCAD 2002: 775-780 | |
| 21 | Luís Guerra e Silva, João P. Marques Silva, Luis Miguel Silveira, Karem A. Sakallah: Satisfiability models and algorithms for circuit delay computation. ACM Trans. Design Autom. Electr. Syst. 7(1): 137-158 (2002) | |
| 20 | Luis Miguel Silveira, Nuno Vargas: Characterizing Substrate Coupling in Deep-Submicron Designs. IEEE Design & Test of Computers 19(2): 4-15 (2002) | |
| 2001 | ||
| 19 | Carlos P. Coelho, Joel R. Phillips, Luis Miguel Silveira: A Convex Programming Approach to Positive Real Rational Approximation. ICCAD 2001: 245-251 | |
| 18 | Joel R. Phillips, Luis Miguel Silveira: Simulation Approaches for Strongly Coupled Interconnect Systems. ICCAD 2001: 430- | |
| 2000 | ||
| 17 | L. Miguel Silveira, Srinivas Devadas, Ricardo Augusto da Luz Reis: VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal Kluwer 2000 | |
| 16 | Edoardo Charbon, Luis Miguel Silveira, Paolo Miliozzi: A benchmark suite for substrate analysis. ASP-DAC 2000: 617-622 | |
| 1999 | ||
| 15 | Carlos P. Coelho, Joel R. Phillips, Luis Miguel Silveira: Robust Rational Function Approximation Algorithm for Model Generation. DAC 1999: 207-212 | |
| 14 | Mattan Kamon, Nuno Alexandre Marques, Yehia Massoud, Luis Miguel Silveira, Jacob White: Interconnect Analysis: From 3-D Structures to Circuit Models. DAC 1999: 910-914 | |
| 13 | Joao Paulo Costa, L. Miguel Silveira, Mike Chou: Efficient Techniques for Accurate Extraction and Modeling of Substrate Coupling in Mixed-Signal IC's. DATE 1999: 396-400 | |
| 12 | Luís Guerra e Silva, Luis Miguel Silveira, João P. Marques Silva: Algorithms for Solving Boolean Satisfiability in Combinational Circuits. DATE 1999: 526-530 | |
| 11 | Joao Paulo Costa, Mike Chou, Luis Miguel Silveira: Efficient techniques for accurate modeling and simulation ofsubstrate coupling in mixed-signal IC's. IEEE Trans. on CAD of Integrated Circuits and Systems 18(5): 597-607 (1999) | |
| 1998 | ||
| 10 | Nuno Alexandre Marques, Mattan Kamon, Jacob White, Luis Miguel Silveira: A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects. DAC 1998: 297-302 | |
| 9 | Nuno Alexandre Marques, Mattan Kamon, Jacob White, Luis Miguel Silveira: An Efficient Algorithm for Fast Parasitic Extraction and Passive Order Reduction of 3D Interconnect Models. DATE 1998: 538-543 | |
| 8 | Joao Paulo Costa, Mike Chou, L. Miguel Silveira: Efficient Techniques for Accurate Modeling and Simulation of Substrate Coupling in Mixed-Signal IC's. DATE 1998: 892-898 | |
| 1996 | ||
| 7 | Luis Miguel Silveira, Mattan Kamon, Ibrahim M. Elfadel, Jacob White: A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits. ICCAD 1996: 288-294 | |
| 1995 | ||
| 6 | Luis Miguel Silveira, Mattan Kamon, Jacob White: Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances Associated with 3-D Interconnect Structures. DAC 1995: 376-380 | |
| 1994 | ||
| 5 | Luis Miguel Silveira, Ibrahim M. Elfadel, Jacob White, Moni Chilukuri, Kenneth S. Kundert: An Efficient Approach to Transmission Line Simulation Using Measured or Tabulated S-parameter Data. DAC 1994: 634-639 | |
| 1993 | ||
| 4 | Andrew Lumsdaine, Luis Miguel Silveira, Jacob K. White: Massively parallel simulation algorithms for grid-based analog signal processors. IEEE Trans. on CAD of Integrated Circuits and Systems 12(11): 1665-1678 (1993) | |
| 1992 | ||
| 3 | Luis Miguel Silveira, Jacob K. White, Horácio C. Neto, Luís M. Vidigal: On exponential fitting for circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(5): 566-574 (1992) | |
| 1991 | ||
| 2 | Luis Miguel Silveira, Jacob White, Steven Leeb: A Modified Envelope-Following Approach to Clocked Analog Circuit Simulation. ICCAD 1991: 20-23 | |
| 1990 | ||
| 1 | Luis Miguel Silveira, Andrew Lumsdaine, Jacob White: Parallel Simulation Algorithms for Grid-Based Analog Signal Processors. ICCAD 1990: 442-445 | |
Colors in the list of coauthors
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