K. C. Shashidhar

	2011
13		Muzammil Shahbaz, K. C. Shashidhar, Robert Eschbach: Iterative refinement of specification for component based embedded systems. ISSTA 2011: 276-286
	2010
12		A. C. Rajeev, Prahladavaradan Sampath, K. C. Shashidhar, S. Ramesh: CoGenTe: a tool for code generator testing. ASE 2010: 349-350
	2009
11		Aditya Kanade, Rajeev Alur, Franjo Ivancic, S. Ramesh, Sriram Sankaranarayanan, K. C. Shashidhar: Generating and Analyzing Symbolic Traces of Simulink/Stateflow Models. CAV 2009: 430-445
	2008
10		Ambar A. Gadkari, Anand Yeolekar, J. Suresh, S. Ramesh, Swarup Mohalik, K. C. Shashidhar: AutoMOTGen: Automatic Model Oriented Test Generator for Embedded Control Systems. CAV 2008: 204-208
9		Rajeev Alur, Aditya Kanade, S. Ramesh, K. C. Shashidhar: Symbolic analysis for improving simulation coverage of Simulink/Stateflow models. EMSOFT 2008: 89-98
8		Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar: Behaviour Directed Testing of Auto-code Generators. SEFM 2008: 191-200
	2007
7		Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar: Testing Model-Processing Tools for Embedded Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2007: 203-214
6		Prahladavaradan Sampath, A. C. Rajeev, K. C. Shashidhar, S. Ramesh: How to Test Program Generators? A Case Study using flex. SEFM 2007: 80-92
5		K. C. Shashidhar, Maurice Bruynooghe, Francky Catthoor, Gerda Janssens: Functional Equivalence Checking for Verification of Algebraic Transformations on Array-Intensive Source Code CoRR abs/0710.4689: (2007)
	2005
4		K. C. Shashidhar, Maurice Bruynooghe, Francky Catthoor, Gerda Janssens: Verification of Source Code Transformations by Program Equivalence Checking. CC 2005: 221-236
3		K. C. Shashidhar, Maurice Bruynooghe, Francky Catthoor, Gerda Janssens: Functional Equivalence Checking for Verification of Algebraic Transformations on Array-Intensive Source Code. DATE 2005: 1310-1315
	2003
2		K. C. Shashidhar, Maurice Bruynooghe, Francky Catthoor, Gerda Janssens: An Automatic Verification Technique for Loop and Data Reuse Transformations based on Geometric Modeling of Programs. J. UCS 9(3): 248-269 (2003)
	2002
1		K. C. Shashidhar, Maurice Bruynooghe, Francky Catthoor, Gerda Janssens: Geometric Model Checking: An Automatic Verification Technique for Loop and Data Reuse Transformations. Electr. Notes Theor. Comput. Sci. 65(2): 67-82 (2002)

Coauthor Index

1	Rajeev Alur	[9] [11]
2	Maurice Bruynooghe	[1] [2] [3] [4] [5]
3	Francky Catthoor	[1] [2] [3] [4] [5]
4	Robert Eschbach	[13]
5	Ambar A. Gadkari	[10]
6	Franjo Ivancic	[11]
7	Gerda Janssens	[1] [2] [3] [4] [5]
8	Aditya Kanade	[9] [11]
9	Swarup Mohalik	[10]
10	A. C. Rajeev	[6] [7] [8] [12]
11	S. Ramesh (Sethu Ramesh)	[6] [7] [8] [9] [10] [11] [12]
12	Prahladavaradan Sampath	[6] [7] [8] [12]
13	Sriram Sankaranarayanan	[11]
14	Muzammil Shahbaz	[13]
15	J. Suresh	[10]
16	Anand Yeolekar	[10]

Colors in the list of coauthors

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