Nuria Pazos

	2007
7		Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli: Early wire characterization for predictable network-on-chip global interconnects. SLIP 2007: 57-64
6		I. Hatyrnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici: Predictable system interconnects through accurate early wire characterization. SoCC 2007: 287-290
	2006
5		Derin Derin Harmanci, Nuria Pazos, Paolo Ienne, Yusuf Leblebici: A Predictable Communication Scheme for Embedded Multiprocessor Systems. VLSI-SoC 2006: 152-157
	2003
4		Winthir Brunnbauer, Thomas Wild, Jürgen Foag, Nuria Pazos: A Constructive Algorithm with Look-Ahead for Mapping and Scheduling of Task Graphs with Conditional Edges. DSD 2003: 98-103
3		Thomas Wild, Jürgen Foag, Nuria Pazos, Winthir Brunnbauer: Mapping and Scheduling for Architecture Exploration of Networking SoCs. VLSI Design 2003: 376-381
	2002
2		Jürgen Foag, Nuria Pazos, Thomas Wild, Winthir Brunnbauer: Self-Adaptive Parallel Processing Architecture For High-speed Networking. HPCS 2002: 45-52
1		Jürgen Foag, Thomas Wild, Nuria Pazos, Winthir Brunnbauer: Predictive methodology for high-performance networking. ISCC 2002: 169-174

Coauthor Index

1	David Atienza (David Atienza Alonso)	[7]
2	Stéphane Badel	[6] [7]
3	Winthir Brunnbauer	[1] [2] [3] [4]
4	Jürgen Foag	[1] [2] [3] [4]
5	Derin Derin Harmanci	[5]
6	Ilhan Hatirnaz	[7]
7	I. Hatyrnaz	[6]
8	Paolo Ienne	[5]
9	Yusuf Leblebici	[5] [6] [7]
10	Giovanni De Micheli	[7]
11	Srinivasan Murali	[7]
12	Thomas Wild	[1] [2] [3] [4]

Colors in the list of coauthors

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