 | 2012 |
| 10 |  | Robert Payne,
Tatsuya Saito:
Session 7 overview: Multi-Gb/s receiver and parallel I/O techniques: Wireline subcommittee.
ISSCC 2012: 128-129 |
| 2011 |
| 9 |  | Robert Payne,
Charles Sestok,
William Bright,
Manar El-Chammas,
Marco Corsi,
David Smith,
Noam Tal:
A 12b 1GS/s SiGe BiCMOS two-way time-interleaved pipeline ADC.
ISSCC 2011: 182-184 |
| 8 |  | Jerry Lin,
Franz Dielacher,
Jing-Hong Conan Zhan,
Robert Payne:
Good, bad, ugly - 20 years of broadband evolution: What's next?
ISSCC 2011: 525 |
| 2010 |
| 7 |  | Robert Payne,
Marco Corsi,
David Smith,
Scott Kaylor,
Daniel Hsieh:
A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR.
ISSCC 2010: 294-295 |
| 6 |  | Naresh R. Shanbhag,
Koichi Yamaguchi,
Robert Payne:
Energy-efficient high-speed interfaces.
ISSCC 2010: 524-525 |
| 5 |  | Robert Payne,
Marco Corsi,
David Smith,
Tien-Ling Hsieh,
Scott Kaylor:
A 16-Bit 100 to 160 MS/s SiGe BiCMOS Pipelined ADC With 100 dBFS SFDR.
J. Solid-State Circuits 45(12): 2613-2622 (2010) |
| 2009 |
| 4 |  | Hao Liu,
Jin Liu,
Robert Payne,
Cy Cantrell,
Mark Morgan:
A 18mW 10Gbps continuous-time FIR equalizer for wired line data communications in 0.12µm CMOS.
CICC 2009: 113-116 |
| 3 |  | Ali Sheikholeslami,
Robert Payne:
Will ADCs overtake binary frontends in backplane signaling?
ISSCC 2009: 514 |
| 1999 |
| 2 |  | Richard Goering,
Pierre Bricaud,
James G. Dougherty,
Steve Glaser,
Michael Keating,
Robert Payne,
Davoud Samani:
Panel: What is the Proper System on Chip Design Methodology.
DAC 1999: 999 |
| 1962 |
| 1 |  | Lawrence Stark,
Robert Payne,
Yutaka Okabe:
Online digital computer measurement of a neurological control system.
Commun. ACM 5(11): 567-568 (1962) |