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| 2011 | ||
|---|---|---|
| 2 | Sudheer Kurakula, A. S. D. P. Sudhansh, Roy Paily, S. Dandapat: Design of QRS Detection and Heart Rate Estimation System on FPGA. ACC (4) 2011: 165-174 | |
| 2008 | ||
| 1 | Depak Balemarthy, Roy Paily: A 1.8/2.4-ghz dualband cmos low noise amplifier using miller capacitance tuning. ISLPED 2008: 295-300 | |
| 1 | Depak Balemarthy | [1] |
| 2 | S. Dandapat | [2] |
| 3 | Sudheer Kurakula | [2] |
| 4 | A. S. D. P. Sudhansh | [2] |
Colors in the list of coauthors
Last update Sun Jun 3 16:06:10 2012 CET by the DBLP Team —
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