 | 2012 |
| 39 |  | Ramon Bertran,
Yolanda Becerra,
David Carrera,
Vicenç Beltran,
Marc González,
Xavier Martorell,
Nacho Navarro,
Jordi Torres,
Eduard Ayguadé:
Energy accounting for shared virtualized environments under DVFS using PMC-based power models.
Future Generation Comp. Syst. 28(2): 457-468 (2012) |
| 2011 |
| 38 |  | Carlos Villavieja,
Yoav Etsion,
Alex Ramírez,
Nacho Navarro:
FELI: HW/SW Support for On-Chip Distributed Shared Memory in Multicores.
Euro-Par (1) 2011: 282-294 |
| 37 |  | Tassadaq Hussain,
Miquel Pericàs,
Nacho Navarro,
Eduard Ayguadé:
Implementation of a Reverse Time Migration kernel using the HCE High Level Synthesis tool.
FPT 2011: 1-8 |
| 36 |  | Lluc Alvarez,
Ramon Bertran,
Marc González,
Xavier Martorell,
Nacho Navarro,
Eduard Ayguadé:
Design space exploration for aggressive core replication schemes in CMPs.
HPDC 2011: 269-270 |
| 35 |  | Carlos Villavieja,
Vasileios Karakostas,
Lluís Vilanova,
Yoav Etsion,
Alex Ramírez,
Avi Mendelson,
Nacho Navarro,
Adrián Cristal,
Osman S. Unsal:
DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory.
PACT 2011: 340-349 |
| 34 |  | Ramon Bertran,
Marc González,
Xavier Martorell,
Nacho Navarro,
Eduard Ayguadé:
Local Memory Design Space Exploration for High-Performance Computing.
Comput. J. 54(5): 786-799 (2011) |
| 33 |  | Mauricio Araya-Polo,
Javier Cabezas,
Mauricio Hanzich,
Miquel Pericàs,
Félix Rubio,
Isaac Gelado,
Muhammad Shafiq,
Enric Morancho,
Nacho Navarro,
Eduard Ayguadé,
José María Cela,
Mateo Valero:
Assessing Accelerator-Based HPC Reverse Time Migration.
IEEE Trans. Parallel Distrib. Syst. 22(1): 147-162 (2011) |
| 2010 |
| 32 |  | Isaac Gelado,
Javier Cabezas,
Nacho Navarro,
John E. Stone,
Sanjay J. Patel,
Wen-mei W. Hwu:
An asymmetric distributed shared memory model for heterogeneous parallel systems.
ASPLOS 2010: 347-358 |
| 31 |  | Muhammad Shafiq,
Miquel Pericàs,
Nacho Navarro,
Eduard Ayguadé:
FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators.
FPL 2010: 568-573 |
| 30 |  | Ramon Bertran,
Marc González,
Xavier Martorell,
Nacho Navarro,
Eduard Ayguadé:
Decomposable and responsive power models for multicore processors using performance counters.
ICS 2010: 147-158 |
| 29 |  | Mateo Valero,
Nacho Navarro:
Multicore: The View from Europe.
IEEE Micro 30(5): 2-4 (2010) |
| 2009 |
| 28 |  | Víctor J. Jiménez,
Lluís Vilanova,
Isaac Gelado,
Marisa Gil,
Grigori Fursin,
Nacho Navarro:
Predictive Runtime Code Scheduling for Heterogeneous Architectures.
HiPEAC 2009: 19-33 |
| 27 |  | Julio Merino,
Lluc Alvarez,
Marisa Gil,
Nacho Navarro:
Cetra: A trace and analysis framework for the evaluation of Cell BE systems.
ISPASS 2009: 43-52 |
| 26 |  | Javier Cabezas,
Mauricio Araya-Polo,
Isaac Gelado,
Nacho Navarro,
Enric Morancho,
José María Cela:
High-Performance Reverse Time Migration on GPU.
SCCC 2009: 77-86 |
| 25 |  | Steven S. Lumetta,
Nacho Navarro:
CASES 2007 guest editors' introduction.
Design Autom. for Emb. Sys. 13(1-2): 89 (2009) |
| 24 |  | Dominique Chanet,
Javier Cabezas,
Enric Morancho,
Nacho Navarro,
Koen De Bosschere:
Linux Kernel Compaction through Cold Code Swapping.
T. HiPEAC 2: 173-200 (2009) |
| 2008 |
| 23 |  | Isaac Gelado,
John H. Kelm,
Shane Ryoo,
Steven S. Lumetta,
Nacho Navarro,
Wen-mei W. Hwu:
CUBA: an architecture for efficient CPU/co-processor data communication.
ICS 2008: 299-308 |
| 2007 |
| 22 |  | Taewhan Kim,
Pascal Sainrat,
Steven S. Lumetta,
Nacho Navarro:
Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007
ACM 2007 |
| 21 |  | Wen-mei W. Hwu,
Shane Ryoo,
Sain-Zee Ueng,
John H. Kelm,
Isaac Gelado,
Sam S. Stone,
Robert E. Kidd,
Sara S. Baghsorkhi,
Aqeel Mahesri,
Stephanie C. Tsao,
Nacho Navarro,
Steven S. Lumetta,
Matthew I. Frank,
Sanjay J. Patel:
Implicitly Parallel Programming Models for Thousand-Core Microprocessors.
DAC 2007: 754-759 |
| 20 |  | John H. Kelm,
Isaac Gelado,
Mark J. Murphy,
Nacho Navarro,
Steven S. Lumetta,
Wen-mei W. Hwu:
CIGAR: Application Partitioning for a CPU/Coprocessor Architecture.
PACT 2007: 317-326 |
| 19 |  | Koen De Bosschere,
Wayne Luk,
Xavier Martorell,
Nacho Navarro,
Michael F. P. O'Boyle,
Dionisios N. Pnevmatikatos,
Alex Ramírez,
Pascal Sainrat,
André Seznec,
Per Stenström,
Olivier Temam:
High-Performance Embedded Architecture and Compilation Roadmap.
T. HiPEAC 1: 5-29 (2007) |
| 2006 |
| 18 |  | Yolanda Becerra,
Jordi Garcia,
Toni Cortes,
Nacho Navarro:
Java Virtual Machine: the key for accurated memory prefetching.
Software Engineering Research and Practice 2006: 933-939 |
| 2005 |
| 17 |  | Thomas M. Conte,
Nacho Navarro,
Wen-mei W. Hwu,
Mateo Valero,
Theo Ungerer:
High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings
Springer 2005 |
| 2003 |
| 16 |  | Yolanda Becerra,
Toni Cortes,
Jordi Garcia,
Nacho Navarro:
Evaluating the importance of virtual memory for Java.
ISPASS 2003: 101-110 |
| 15 |  | Ronald D. Barnes,
Erik M. Nystrom,
John W. Sias,
Sanjay J. Patel,
Nacho Navarro,
Wen-mei W. Hwu:
Beating in-order stalls with "flea-flicker" two-pass pipelining.
MICRO 2003: 387-398 |
| 2001 |
| 14 |  | José Oliver,
Jordi Guitart,
Eduard Ayguadé,
Nacho Navarro,
Jordi Torres:
Strategies for the efficient exploitation of loop-level parallelism in Java.
Concurrency and Computation: Practice and Experience 13(8-9): 663-680 (2001) |
| 2000 |
| 13 |  | Marc González,
Albert Serra,
Xavier Martorell,
José Oliver,
Eduard Ayguadé,
Jesús Labarta,
Nacho Navarro:
Applying Interposition Techniques for Performance Analysis of OpenMP Parallel Applications.
IPDPS 2000: 235-240 |
| 12 |  | Xavier Martorell,
Julita Corbalán,
Dimitrios S. Nikolopoulos,
Nacho Navarro,
Eleftherios D. Polychronopoulos,
Theodore S. Papatheodorou,
Jesús Labarta:
A Tool to Schedule Parallel Applications on Multiprocessors: The NANOS CPU MANAGER.
JSSPP 2000: 87-112 |
| 11 |  | José Oliver,
Eduard Ayguadé,
Nacho Navarro:
Towards an efficient exploitation of loop-level parallelism in Java.
Java Grande 2000: 9-15 |
| 10 |  | Marc González,
José Oliver,
Xavier Martorell,
Eduard Ayguadé,
Jesús Labarta,
Nacho Navarro:
OpenMP Extensions for Thread Groups and Their Run-Time Support.
LCPC 2000: 324-338 |
| 9 |  | Albert Serra,
Nacho Navarro,
Toni Cortes:
DITools: Application-level Support for Dynamic Extension and Flexible Composition.
USENIX Annual Technical Conference, General Track 2000: 225-238 |
| 8 |  | Marc González,
Eduard Ayguadé,
Xavier Martorell,
Jesús Labarta,
Nacho Navarro,
José Oliver:
NanosCompiler: supporting flexible multilevel parallelism exploitation in OpenMP.
Concurrency - Practice and Experience 12(12): 1205-1218 (2000) |
| 1999 |
| 7 |  | Eduard Ayguadé,
Xavier Martorell,
Jesús Labarta,
Marc González,
Nacho Navarro:
Exploiting Multiple Levels of Parallelism in OpenMP: A Case Study.
ICPP 1999: 172-180 |
| 6 |  | Xavier Martorell,
Eduard Ayguadé,
Nacho Navarro,
Julita Corbalán,
Marc González,
Jesús Labarta:
Thread fork/join techniques for multi-level parallelism exploitation in NUMA multiprocessors.
International Conference on Supercomputing 1999: 294-301 |
| 1998 |
| 5 |  | Eleftherios D. Polychronopoulos,
Xavier Martorell,
Dimitrios S. Nikolopoulos,
Jesús Labarta,
Theodore S. Papatheodorou,
Nacho Navarro:
Kernel-level Scheduling for the Nano-threads Programming Model.
International Conference on Supercomputing 1998: 337-344 |
| 1997 |
| 4 |  | Xavier Martorell,
Jesús Labarta,
Nacho Navarro,
Eduard Ayguadé:
Analysis of Several Scheduling Algorithms under the Nano-Thread Programming Model.
IPPS 1997: 281-287 |
| 3 |  | Eduard Ayguadé,
Xavier Martorell,
Jesús Labarta,
Marc González,
Nacho Navarro:
Exploiting Parallelism Through Directives on the Nano-Threads Programming Model.
LCPC 1997: 307-321 |
| 1996 |
| 2 |  | Xavier Martorell,
Jesús Labarta,
Nacho Navarro,
Eduard Ayguadé:
A Library Implementation of the Nano-Threads Programming Model.
Euro-Par, Vol. II 1996: 644-649 |
| 1995 |
| 1 |  | Marisa Gil,
Xavier Martorell,
Nacho Navarro:
The eXc Model: Scheduler-Activations on Mach 3.0.
Parallel and Distributed Computing and Systems 1995: 5-10 |