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| 2003 | ||
|---|---|---|
| 2 | Akira Hirose, Kazuhiko Nakazawa: Analog continuous-time recurrent decision circuit with high signal-voltage symmetry and delay-time equality. ISCAS (5) 2003: 657-660 | |
| 1 | Akira Hirose, Kazuhiko Nakazawa: Analog recurrent decision circuit with high signal-voltage symmetry and delay-time equality to improve continuous-time convergence performance. IEEE Transactions on Neural Networks 14(5): 1201-1206 (2003) | |
| 1 | Akira Hirose | [1] [2] |
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