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Sachio Naito Coauthor index pubzone.org

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DBLP keys1995
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYukiya Miura, Sachio Naito: A Method of Current Testing for CMOS Digital and Mixed-Signal LSIs. IEICE Transactions 78-D(7): 845-852 (1995)
1994
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYukiya Miura, Sachio Naito, Kozo Kinoshita: A Case Study of Mixed-Signal Integrated Circuit Testing: An Application of Current Testing Using the Upper Limit and the Lower Limit. ISCAS 1994: 77-80
1988
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMasahiro Tsunoyama, Sachio Naito: A fault-tolerant parallel processor modeled by a linear cellular automaton. FTCS 1988: 334-339

Coauthor Index

1Kozo Kinoshita [2]
2Yukiya Miura [2] [3]
3Masahiro Tsunoyama [1]

Colors in the list of coauthors

Last update Mon Jun 4 20:40:43 2012 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page