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| 2009 | ||
|---|---|---|
| 3 | Kelageri Nagaraj, Sandip Kundu: Process variation mitigation via post silicon clock tuning. ACM Great Lakes Symposium on VLSI 2009: 227-232 | |
| 2 | Kelageri Nagaraj, Sandip Kundu: A study on placement of post silicon clock tuning buffers for mitigating impact of process variation. DATE 2009: 292-295 | |
| 2008 | ||
| 1 | Kelageri Nagaraj, Sandip Kundu: An Automatic Post Silicon Clock Tuning System for Improving System Performance based on Tester Measurements. ITC 2008: 1-8 | |
| 1 | Sandip Kundu | [1] [2] [3] |
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