Yosuke Mutsuda

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2005

2 Yosuke Mutsuda, Takaaki Kato, Satoshi Yamane: Specification and Verification Techniques of Embedded Systems Using Probabilistic Linear Hybrid Automata. ICESS 2005: 346-360

1 Yosuke Mutsuda, Takaaki Kato, Satoshi Yamane: Symbolic Reachability Analysis of Probabilistic Linear Hybrid Automata. IEICE Transactions 88-A(11): 2972-2981 (2005)

	2005
2		Yosuke Mutsuda, Takaaki Kato, Satoshi Yamane: Specification and Verification Techniques of Embedded Systems Using Probabilistic Linear Hybrid Automata. ICESS 2005: 346-360
1		Yosuke Mutsuda, Takaaki Kato, Satoshi Yamane: Symbolic Reachability Analysis of Probabilistic Linear Hybrid Automata. IEICE Transactions 88-A(11): 2972-2981 (2005)

Coauthor Index

1 Takaaki Kato [1] [2]

2 Satoshi Yamane [1] [2]

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