Onur Mutlu

	2012
80		José A. Joao, M. Aater Suleman, Onur Mutlu, Yale N. Patt: Bottleneck identification and scheduling in multithreaded applications. ASPLOS 2012: 223-234
79		Yu Cai, Erich F. Haratsch, Onur Mutlu, Ken Mai: Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis. DATE 2012: 521-526
78		Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt: Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multicore Memory Systems. ACM Trans. Comput. Syst. 30(2): 7 (2012)
	2011
77		Chris Fallin, Chris Craik, Onur Mutlu: CHIPPER: A low-complexity bufferless deflection router. HPCA 2011: 144-155
76		Howard David, Chris Fallin, Eugene Gorbatov, Ulf R. Hanebutte, Onur Mutlu: Memory power management via dynamic voltage/frequency scaling. ICAC 2011: 31-40
75		Licheng Chen, Yongbing Huang, Yungang Bao, Onur Mutlu, Guangming Tan, Mingyu Chen: Poster: revisiting virtual channel memory for performance and fairness on multi-core architecture. ICS 2011: 379
74		Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt: Prefetch-aware shared resource management for multi-core systems. ISCA 2011: 141-152
73		Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu: Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees. ISCA 2011: 401-412
72		Onur Mutlu: Memory systems in the many-core era: challenges, opportunities, and solution directions. ISMM 2011: 77-78
71		Veynu Narasiman, Michael Shebanow, Chang Joo Lee, Rustam Miftakhutdinov, Onur Mutlu, Yale N. Patt: Improving GPU performance via large warps and two-level warp scheduling. MICRO 2011: 308-317
70		Eiman Ebrahimi, Rustam Miftakhutdinov, Chris Fallin, Chang Joo Lee, José A. Joao, Onur Mutlu, Yale N. Patt: Parallel application memory scheduling. MICRO 2011: 362-373
69		Sai Prashanth Muralidhara, Lavanya Subramanian, Onur Mutlu, Mahmut T. Kandemir, Thomas Moscibroda: Reducing memory interference in multicore systems via application-aware memory channel partitioning. MICRO 2011: 374-385
68		Michael Papamichael, James C. Hoe, Onur Mutlu: FIST: A fast, lightweight, FPGA-friendly packet latency estimator for NoC modeling in full-system simulations. NOCS 2011: 137-144
67		Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das: Aérgia: A Network-on-Chip Exploiting Packet Latency Slack. IEEE Micro 31(1): 29-41 (2011)
66		M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt: Data Marshaling for Multicore Systems. IEEE Micro 31(1): 56-64 (2011)
65		Yale N. Patt, Onur Mutlu: Top Picks [Guest editors' introduction]. IEEE Micro 31(1): 6-10 (2011)
64		Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter: Thread Cluster Memory Scheduling. IEEE Micro 31(1): 78-89 (2011)
63		Chang Joo Lee, Onur Mutlu, Veynu Narasiman, Yale N. Patt: Prefetch-Aware Memory Controllers. IEEE Trans. Computers 60(10): 1406-1430 (2011)
	2010
62		Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt: Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems. ASPLOS 2010: 335-346
61		Yoongu Kim, Dongsu Han, Onur Mutlu, Mor Harchol-Balter: ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers. HPCA 2010: 1-12
60		George Nychis, Chris Fallin, Thomas Moscibroda, Onur Mutlu: Next generation on-chip networks: what kind of congestion control do we need? HotNets 2010: 12
59		Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das: Aérgia: exploiting packet latency slack in on-chip networks. ISCA 2010: 106-116
58		M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt: Data marshaling for multi-core architectures. ISCA 2010: 441-450
57		Boris Grot, Stephen W. Keckler, Onur Mutlu: Topology-Aware Quality-of-Service Support in Highly Integrated Chip Multiprocessors. ISCA Workshops 2010: 357-375
56		Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter: Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior. MICRO 2010: 65-76
55		Paul Bogdan, Miray Kas, Radu Marculescu, Onur Mutlu: QuaLe: A Quantum-Leap Inspired Model for Non-stationary Analysis of NoC Traffic in Chip Multi-processors. NOCS 2010: 241-248
54		Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Onur Mutlu, Mateo Valero: Efficient runahead threads. PACT 2010: 443-452
53		Yanjing Li, Onur Mutlu, Donald S. Gardner, Subhasish Mitra: Concurrent autonomous self-test for uncore components in system-on-chips. VTS 2010: 232-237
52		Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger: Phase change memory architecture and the quest for scalability. Commun. ACM 53(7): 99-106 (2010)
51		Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, Doug Burger: Phase-Change Technology and the Future of Main Memory. IEEE Micro 30(1): 143 (2010)
50		M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt: Accelerating Critical Section Execution with Asymmetric Multicore Architectures. IEEE Micro 30(1): 60-70 (2010)
	2009
49		M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt: Accelerating critical section execution with asymmetric multi-core architectures. ASPLOS 2009: 253-264
48		Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu: Express Cube Topologies for on-Chip Interconnects. HPCA 2009: 163-174
47		Eiman Ebrahimi, Onur Mutlu, Yale N. Patt: Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems. HPCA 2009: 7-17
46		Yanjing Li, Onur Mutlu, Subhasish Mitra: Operating system scheduling for efficient online self-test in robust systems. ICCAD 2009: 201-208
45		Thomas Moscibroda, Onur Mutlu: A case for bufferless routing in on-chip networks. ISCA 2009: 196-207
44		Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger: Architecting phase change memory as a scalable dram alternative. ISCA 2009: 2-13
43		José A. Joao, Onur Mutlu, Yale N. Patt: Flexible reference-counting-based hardware acceleration for garbage collection. ISCA 2009: 418-428
42		Boris Grot, Stephen W. Keckler, Onur Mutlu: Preemptive virtual clock: a flexible, efficient, and cost-effective QOS scheme for networks-on-chip. MICRO 2009: 268-279
41		Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das: Application-aware prioritization mechanisms for on-chip networks. MICRO 2009: 280-291
40		Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, Yale N. Patt: Coordinated control of multiple prefetchers in multi-core systems. MICRO 2009: 316-326
39		Chang Joo Lee, Veynu Narasiman, Onur Mutlu, Yale N. Patt: Improving memory bank-level parallelism in the presence of prefetching. MICRO 2009: 327-336
38		Onur Mutlu, Thomas Moscibroda: Parallelism-Aware Batch Scheduling: Enabling High-Performance and Fair Shared Memory Controllers. IEEE Micro 29(1): 22-32 (2009)
37		Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco: A Flexible Software-Based Framework for Online Detection of Hardware Defects. IEEE Trans. Computers 58(8): 1063-1079 (2009)
36		Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn: Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware. IEEE Trans. Computers 58(9): 1153-1170 (2009)
	2008
35		David Christie, Alan Lee, Onur Mutlu, Benjamin G. Zorn: 4th International Symposium on Workload Characterization (IISWC 2008), Seattle, Washington, USA, September 14-16, 2008 IEEE 2008
34		José A. Joao, Onur Mutlu, Hyesoon Kim, Rishi Agarwal, Yale N. Patt: Improving the performance of object-oriented languages with dynamic predication of indirect jumps. ASPLOS 2008: 80-90
33		Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Patt: Performance-aware speculation control using wrong path usefulness prediction. HPCA 2008: 39-49
32		Engin Ipek, Onur Mutlu, José F. Martínez, Rich Caruana: Self-Optimizing Memory Controllers: A Reinforcement Learning Approach. ISCA 2008: 39-50
31		Onur Mutlu, Thomas Moscibroda: Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems. ISCA 2008: 63-74
30		Chang Joo Lee, Onur Mutlu, Veynu Narasiman, Yale N. Patt: Prefetch-Aware DRAM Controllers. MICRO 2008: 200-209
29		Kypros Constantinides, Onur Mutlu, Todd M. Austin: Online design bug detection: RTL analysis, flexible mechanisms, and evaluation. MICRO 2008: 282-293
28		Thomas Moscibroda, Onur Mutlu: Distributed order scheduling and its application to multi-core dram controllers. PODC 2008: 365-374
27		Sangyeun Cho, Tao Li, Onur Mutlu: Guest Editors' Introduction: Interaction of Many-Core Computer Architecture and Operating Systems. IEEE Micro 28(3): 2-5 (2008)
	2007
26		Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt: Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors. CGO 2007: 367-378
25		Santhosh Srinath, Onur Mutlu, Hyesoon Kim, Yale N. Patt: Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers. HPCA 2007: 63-74
24		Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn: VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization. ISCA 2007: 424-435
23		Onur Mutlu, Thomas Moscibroda: Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors. MICRO 2007: 146-160
22		Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco: Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation. MICRO 2007: 97-108
21		José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt: Dynamic Predication of Indirect Jumps. Computer Architecture Letters 6(2): 25-28 (2007)
20		José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt: Dynamic Predication of Indirect Jumps. Computer Architecture Letters 7(1): 1-4 (2007)
19		Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt: Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication. IEEE Micro 27(1): 94-104 (2007)
	2006
18		Hyesoon Kim, M. Aater Suleman, Onur Mutlu, Yale N. Patt: 2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set. CGO 2006: 159-172
17		Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu, Yale N. Patt: A Case for MLP-Aware Cache Replacement. ISCA 2006: 167-178
16		Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt: Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths. MICRO 2006: 53-64
15		Onur Mutlu, Hyesoon Kim, Yale N. Patt: Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance. IEEE Micro 26(1): 10-20 (2006)
14		Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark: Wish Branches: Enabling Adaptive and Aggressive Predicated Execution. IEEE Micro 26(1): 48-58 (2006)
13		Onur Mutlu, Hyesoon Kim, Yale N. Patt: Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses. IEEE Trans. Computers 55(12): 1491-1508 (2006)
	2005
12		Moinuddin K. Qureshi, Onur Mutlu, Yale N. Patt: Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors. DSN 2005: 434-443
11		Onur Mutlu, Hyesoon Kim, Yale N. Patt: Techniques for Efficient Processing in Runahead Execution Engines. ISCA 2005: 370-381
10		Onur Mutlu, Hyesoon Kim, Yale N. Patt: Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns. MICRO 2005: 233-244
9		Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt: Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution. MICRO 2005: 43-54
8		Onur Mutlu, Hyesoon Kim, Jared Stark, Yale N. Patt: On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor. Computer Architecture Letters 4(1): 2 (2005)
7		Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt: An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors. IEEE Trans. Computers 54(12): 1556-1571 (2005)
6		Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt: Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References. International Journal of Parallel Programming 33(5): 529-559 (2005)
	2004
5		David N. Armstrong, Hyesoon Kim, Onur Mutlu, Yale N. Patt: Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery. MICRO 2004: 119-128
4		Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt: Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance. SBAC-PAD 2004: 2-9
3		Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt: Understanding the effects of wrong-path memory references on processor performance. WMPI 2004: 56-64
	2003
2		Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt: Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors. HPCA 2003: 129-140
1		Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt: Runahead Execution: An Effective Alternative to Large Instruction Windows. IEEE Micro 23(6): 20-25 (2003)

Coauthor Index

1	Rishi Agarwal	[34]
2	David N. Armstrong	[3] [4] [5] [6] [7]
3	Todd M. Austin	[22] [29] [37]
4	Yungang Bao	[75]
5	Valeria Bertacco	[22] [37]
6	Paul Bogdan	[55]
7	Doug Burger	[44] [51] [52]
8	Yu Cai	[79]
9	Rich Caruana	[32]
10	Licheng Chen	[75]
11	Mingyu Chen	[75]
12	Sangyeun Cho	[27]
13	David Christie	[35]
14	Robert S. Cohn (Robert Cohn)	[24] [36]
15	Kypros Constantinides	[22] [29] [37]
16	Chris Craik	[77]
17	Chita R. Das	[41] [59] [67]
18	Reetuparna Das	[41] [59] [67]
19	Howard David	[76]
20	Eiman Ebrahimi	[40] [47] [62] [70] [74] [78]
21	Chris Fallin	[60] [70] [76] [77]
22	Donald S. Gardner	[53]
23	Eugene Gorbatov	[76]
24	Boris Grot	[42] [48] [57] [73]
25	Dongsu Han	[61]
26	Ulf R. Hanebutte	[76]
27	Erich F. Haratsch	[79]
28	Mor Harchol-Balter	[56] [61] [64]
29	Joel Hestness	[48] [73]
30	James C. Hoe	[68]
31	Yongbing Huang	[75]
32	Engin Ipek	[32] [44] [51] [52]
33	José A. Joao	[16] [19] [20] [21] [24] [26] [34] [36] [43] [58] [66] [70] [80]
34	Mahmut T. Kandemir	[69]
35	Miray Kas	[55]
36	Stephen W. Keckler	[42] [48] [57] [73]
37	Khubaib	[58] [66]
38	Hyesoon Kim	[3] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [16] [18] [19] [20] [21] [24] [25] [26] [33] [34] [36]
39	Yoongu Kim	[56] [61] [64]
40	Alan Lee	[35]
41	Benjamin C. Lee	[44] [51] [52]
42	Chang Joo Lee	[24] [30] [33] [36] [39] [40] [62] [63] [70] [71] [74] [78]
43	Tao Li	[27]
44	Yanjing Li	[46] [53]
45	Daniel N. Lynch	[17]
46	Ken Mai	[79]
47	Radu Marculescu	[55]
48	José F. Martínez	[32]
49	Rustam Miftakhutdinov	[70] [71]
50	Subhasish Mitra	[46] [53]
51	Thomas Moscibroda	[23] [28] [31] [38] [41] [45] [59] [60] [67] [69]
52	Sai Prashanth Muralidhara	[69]
53	Veynu Narasiman	[30] [39] [63] [71]
54	George Nychis	[60]
55	Alex Pajuelo (Alejandro Pajuelo)	[54]
56	Michael Papamichael	[56] [64] [68]
57	Yale N. Patt	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [24] [25] [26] [30] [33] [34] [36] [39] [40] [43] [47] [49] [50] [58] [62] [63] [65] [66] [70] [71] [74] [78] [80]
58	Moinuddin K. Qureshi	[12] [17] [49] [50]
59	Tanausú Ramírez	[54]
60	Oliverio J. Santana	[54]
61	Michael Shebanow	[71]
62	Santhosh Srinath	[25]
63	Jared Stark	[1] [2] [8] [9] [14]
64	Lavanya Subramanian	[69]
65	M. Aater Suleman	[18] [49] [50] [58] [66] [80]
66	Guangming Tan	[75]
67	Mateo Valero	[54]
68	Chris Wilkerson	[1] [2]
69	Jun Yang	[51]
70	Youtao Zhang	[51]
71	Bo Zhao	[51]
72	Ping Zhou	[51]
73	Benjamin G. Zorn	[35]

Colors in the list of coauthors

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