Gerald R. Morris

	2009
9		Justin L. Rice, Khalid H. Abed, Gerald R. Morris: Design Heuristics for Mapping Floating-Point Scientific Computational Kernels onto High Performance Reconfigurable Computers. JCP 4(6): 542-553 (2009)
	2008
8		Gerald R. Morris, Viktor K. Prasanna: A pipelined-loop-compatible architecture and algorithm to reduce variable-length sets of floating-point data on a reconfigurable computer. J. Parallel Distrib. Comput. 68(7): 913-921 (2008)
	2007
7		Gerald R. Morris, Viktor K. Prasanna: Sparse Matrix Computations on Reconfigurable Hardware. IEEE Computer 40(3): 58-64 (2007)
6		Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna: High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs. IEEE Trans. Parallel Distrib. Syst. 18(10): 1377-1392 (2007)
	2006
5		Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson: An FPGA-Based Application-Specific Processor for Efficient Reduction of Multiple Variable-Length Floating-Point Data Sets. ASAP 2006: 323-330
4		Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson: A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer. FCCM 2006: 3-12
	2005
3		Gerald R. Morris, Ling Zhuo, Viktor K. Prasanna: High-Performance FPGA-Based General Reduction Methods. FCCM 2005: 323-324
2		Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna: Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores. IPDPS 2005
1		Gerald R. Morris, Viktor K. Prasanna: An FPGA-Based Floating-Point Jacobi Iterative Solver. ISPAN 2005: 420-427

Coauthor Index

1	Khalid H. Abed	[9]
2	Richard D. Anderson	[4] [5]
3	Viktor K. Prasanna (V. K. Prasanna Kumar)	[1] [2] [3] [4] [5] [6] [7] [8]
4	Justin L. Rice	[9]
5	Ling Zhuo	[2] [3] [6]

Colors in the list of coauthors

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