 | 2007 |
|---|
| 9 |       | Robert F. Molyneaux,
Thomas A. Ziaja,
Hong Kim,
Shahryar Aryani,
Sungbae Hwang,
Alex Hsieh:
Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip.
ITC 2007: 1-8 |
| 2003 |
|---|
| 8 | | Robert F. Molyneaux:
Debug and Diagnosis in the Age of System-on-a-Chip.
ITC 2003: 1303 |
| 2000 |
|---|
| 7 | | Rajesh Raina,
Robert Bailey,
Dawit Belete,
Vikram Khosa,
Robert F. Molyneaux,
Javier Prado,
Ashutosh Razdan:
DFT advances in Motorola's Next-Generation 74xx PowerPCTM microprocessor.
ITC 2000: 131-140 |
| 6 | | Nandu Tendolkar,
Robert F. Molyneaux,
Carol Pyron,
Rajesh Raina:
At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor.
VTS 2000: 3-8 |
| 1999 |
|---|
| 5 | | Carol Pyron,
Mike Alexander,
James Golab,
George Joos,
Bruce Long,
Robert F. Molyneaux,
Rajesh Raina,
Nandu Tendolkar:
DFT advances in the Motorola's MPC7400, a PowerPC G4 microprocessor.
ITC 1999: 137-146 |
| 1998 |
|---|
| 4 | | Rajesh Raina,
Robert F. Molyneaux:
Random Self-Test Method - Applications on PowerPC (tm) Microprocessor Caches.
Great Lakes Symposium on VLSI 1998: 222-229 |
| 1997 |
|---|
| 3 | | Rajesh Raina,
Robert Bailey,
Charles Njinda,
Robert F. Molyneaux,
Charlie Beh:
Efficient Testing of Clock Regenerator Circuits in Scan Designs.
DAC 1997: 95-100 |
| 2 | | Rajesh Raina,
Charles Njinda,
Robert F. Molyneaux:
How Seriously Do You Take Your Possible-Detect Faults?
ITC 1997: 819-828 |
| 1989 |
|---|
| 1 | | Robert F. Molyneaux,
Alexander Albicki:
Comments on "Ternary Scan Design for VLSI Testability".
IEEE Trans. Computers 38(2): 256-263 (1989) |
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