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Y. Mitsui Coauthor index pubzone.org

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DBLP keys1992
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShoji Kawahito, Y. Mitsui, Makoto Ishida, Tetsuro Nakamura: Parallel Hardware Algorithms with Redundant Number Representations for Multiple-Valued Arithmetic VLSI. ISMVL 1992: 337-345

Coauthor Index

1Makoto Ishida [1]
2Shoji Kawahito [1]
3Tetsuro Nakamura [1]

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