Takashi Mine

	2005
2		Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai: Modified hybrid reduction technique for the simulation of linear/nonlinear mixed circuits. ISCAS (5) 2005: 4903-4906
	2004
1		Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai: Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits. DATE 2004: 1327-1333

Coauthor Index

1	Hideki Asai	[1] [2]
2	Atsushi Kamo	[1] [2]
3	Hidemasa Kubota	[1] [2]
4	Takayuki Watanabe	[1] [2]

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