Jialin Mi

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2006

3 Jialin Mi, Chunhong Chen, H. K. Kwan: Power-oriented delay budgeting for combinational circuits. ISCAS 2006

2 Jialin Mi, Chunhong Chen: Finite State Machine Implementation with Single-Electron Tunneling Technology. ISVLSI 2006: 237-241

1 Jialin Mi, Chunhong Chen: Power-Oriented Delay Budgeting for Combinational Circuits. ISVLSI 2006: 361-366

	2006
3		Jialin Mi, Chunhong Chen, H. K. Kwan: Power-oriented delay budgeting for combinational circuits. ISCAS 2006
2		Jialin Mi, Chunhong Chen: Finite State Machine Implementation with Single-Electron Tunneling Technology. ISVLSI 2006: 237-241
1		Jialin Mi, Chunhong Chen: Power-Oriented Delay Budgeting for Combinational Circuits. ISVLSI 2006: 361-366

Coauthor Index

1 Chunhong Chen [1] [2] [3]

2 H. K. Kwan [3]

Last update Sun Jun 3 16:06:10 2012 CET by the DBLP Team —

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