 | 2010 |
| 10 |  | Michalis K. Tsiampas,
Dimitrios Bountas,
Panagiotis Merakos,
Nestoras E. Evmorfopoulos,
Sotiris Bantas,
George I. Stamoulis:
A power grid analysis and verification tool based on a Statistical Prediction Engine.
ICECS 2010: 839-842 |
| 2003 |
| 9 |  | Kostas Masselos,
Panagiotis Merakos,
S. Theoharis,
Thanos Stouraitis,
Constantinos E. Goutis:
Power efficient data path synthesis of sum-of-products computations.
IEEE Trans. VLSI Syst. 11(3): 446-450 (2003) |
| 2002 |
| 8 |  | Kostas Masselos,
Panagiotis Merakos,
Constantinos E. Goutis:
Power Efficient Vector Quantization Design Using Pixel Truncation.
PATMOS 2002: 409-418 |
| 7 |  | Konstantinos Masselos,
Spyros Theoharis,
Panagiotis Merakos,
Thanos Stouraitis,
Costas E. Goutis:
Memory accesses reordering for interconnect power reduction in sum-of-products computations.
IEEE Transactions on Signal Processing 50(11): 2889-2899 (2002) |
| 2000 |
| 6 |  | Kostas Masselos,
S. Theoharis,
Panagiotis Merakos,
Thanos Stouraitis,
Constantinos E. Goutis:
Low power synthesis of sum-of-products computation (poster session).
ISLPED 2000: 234-237 |
| 5 |  | Kostas Masselos,
Panagiotis Merakos,
Thanos Stouraitis,
Constantinos E. Goutis:
Low power architectures for digital signal processing.
Journal of Systems Architecture 46(7): 551-571 (2000) |
| 1999 |
| 4 |  | Kostas Masselos,
Panagiotis Merakos,
Thanos Stouraitis,
Constantinos E. Goutis:
Low power synthesis of sum-of-product computation in DSP algorithms.
ISCAS (6) 1999: 420-423 |
| 3 |  | Kostas Masselos,
Panagiotis Merakos,
Thanos Stouraitis,
Constantinos E. Goutis:
Novel techniques for bus power consumption reduction in realizations of sum-of-product computation.
IEEE Trans. VLSI Syst. 7(4): 492-497 (1999) |
| 1998 |
| 2 |  | Kostas Masselos,
Panagiotis Merakos,
Thanos Stouraitis,
Constantinos E. Goutis:
A novel algorithm for low-power image and video coding.
IEEE Trans. Circuits Syst. Video Techn. 8(3): 258-263 (1998) |
| 1 |  | Kostas Masselos,
Panagiotis Merakos,
Thanos Stouraitis,
Constantinos E. Goutis:
Trade-Off Analysis of a Low-Power Image Coding Algorithm.
VLSI Signal Processing 18(1): 65-80 (1998) |