N. P. van der Meijs

Nick van der Meijs

	2012
30		Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs: Crosstalk-aware statistical interconnect delay calculation. ASP-DAC 2012: 371-376
29		Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs: Transistor-level gate model based statistical timing analysis considering correlations. DATE 2012: 917-922
28		Amir Zjajo, Nick van der Meijs, Rene van Leuken: Thermal analysis of 3D integrated circuits based on discontinuous Galerkin finite element method. ISQED 2012: 117-222
	2011
27		Yu Bi, Pieter Harpe, N. P. van der Meijs: Efficient sensitivity-based capacitance modeling for systematic and random geometric variations. ASP-DAC 2011: 61-66
26		Yu Bi, Simon de Graaf, Nick van der Meijs: Enhanced sensitivity computation for BEM based capacitance extraction using the Schur complement technique. CICC 2011: 1-4
25		Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs: Pseudo circuit model for representing uncertainty in waveforms. DATE 2011: 1521-1524
24		Yu Bi, Kees-Jan van der Kolk, Jorge Fernandez Villena, Luis Miguel Silveira, Nick van der Meijs: Fast statistical analysis of RC nets subject to manufacturing variabilities. DATE 2011: 31-37
23		Amir Zjajo, Qin Tang, Michel Berkelaar, José Pineda de Gyvez, Alessandro Di Bucchianico, Nick van der Meijs: Stochastic Analysis of Deep-Submicrometer CMOS Process for Reliable Circuits Designs. IEEE Trans. on Circuits and Systems 58-I(1): 164-175 (2011)
22		Pieter Harpe, Cui Zhou, Yu Bi, N. P. van der Meijs, Xiaoyan Wang, Kathleen Philips, Guido Dolmans, Harmke de Groot: A 26 μ W 8 bit 10 MS/s Asynchronous SAR ADC for Low Energy Radios. J. Solid-State Circuits 46(7): 1585-1595 (2011)
	2010
21		Amir Zjajo, Qin Tang, Michel Berkelaar, Nick van der Meijs: Noise analysis of non-linear dynamic integrated circuits. CICC 2010: 1-4
20		Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs: RDE-based transistor-level gate simulation for statistical static timing analysis. DAC 2010: 787-792
19		Alejandro Viteri, Amir Zjajo, Thijmen Hamoen, Nick van der Meijs: Digital cartesian feedback linearization of switched mode power amplifiers. ICECS 2010: 890-893
18		Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs: Transistor-Level Gate Modeling for Nano CMOS Circuit Verification Considering Statistical Process Variations. PATMOS 2010: 190-199
17		Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs: Statistical Moment Estimation of Delay and Power in Circuit Simulation. J. Low Power Electronics 6(4): 578-587 (2010)
	2009
16		Yu Bi, Kees-Jan van der Kolk, Nick van der Meijs: Sensitivity computation using domain-decomposition for boundary element method based capacitance extractors. CICC 2009: 423-426
15		Nuo Li, Nick van der Meijs: A Radix 22 based parallel pipeline FFT processor for MB-OFDM UWB system. SoCC 2009: 383-386
	2004
14		Giuseppe S. Garcea, N. P. van der Meijs, Kees-Jan van der Kolk, Ralph H. J. M. Otten: Statistically Aware Buffer Planning. DATE 2004: 1402-1403
	2003
13		Giuseppe S. Garcea, N. P. van der Meijs, Ralph H. J. M. Otten: Simultaneous Analytic Area and Power Optimization for Repeater Insertion. ICCAD 2003: 568-573
	2002
12		Eelco Schrik, N. P. van der Meijs: Combined BEM/FEM substrate resistance modeling. DAC 2002: 771-776
11		Eelco Schrik, Patrick Dewilde, N. P. van der Meijs: Theoretical and practical validation of combined BEM/FEM substrate resistance modeling. ICCAD 2002: 10-15
	1999
10		A. J. Dammers, N. P. van der Meijs: Virtual screening: a step towards a sparse partial inductance matrix. ICCAD 1999: 445-452
	1997
9		U. Geigenmüller, N. P. van der Meijs: Cartesian multipole based numerical integration for 3D capacitance extraction. ED&TC 1997: 256-259
	1996
8		Arjan J. van Genderen, N. P. van der Meijs: Using Articulation Nodes to Improve the Efficiency of Finite-Element based Resistance Extraction. DAC 1996: 758-763
7		P. J. H. Elias, N. P. van der Meijs: Extracting Circuit Models for Large RC Interconnections that are Accurate up to a Predefined Signal Frequency. DAC 1996: 764-769
6		N. P. van der Meijs, T. Smedes: Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits. ICCAD 1996: 244-251
	1995
5		N. P. van der Meijs, Arjan J. van Genderen: Delayed Frontal Solution for Finite-Element Based Resistance Extraction. DAC 1995: 273-278
4		T. Smedes, N. P. van der Meijs, Arjan J. van Genderen: Extraction of circuit models for substrate cross-talk. ICCAD 1995: 199-206
3		Frederik Beeftink, Arjan J. van Genderen, N. P. van der Meijs: Accurate and efficient layout-to-circuit extraction for high-speed MOS and bipolar/BiCMOS integrated circuits. ICCD 1995: 360-365
	1993
2		Arjan J. van Genderen, N. P. van der Meijs: Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures. ICCAD 1993: 764-769
	1989
1		N. P. van der Meijs, Arjan J. van Genderen: An Efficient Finite Element Method for Submicron IC Capacitance Extraction. DAC 1989: 678-681

Coauthor Index

1	Frederik Beeftink	[3]
2	Michel Berkelaar	[17] [18] [20] [21] [23] [25] [29] [30]
3	Yu Bi	[16] [22] [24] [26] [27]
4	Alessandro Di Bucchianico	[23]
5	A. J. Dammers	[10]
6	Patrick Dewilde	[11]
7	Guido Dolmans	[22]
8	P. J. H. Elias	[7]
9	Giuseppe S. Garcea	[13] [14]
10	U. Geigenmüller	[9]
11	Arjan J. van Genderen	[1] [2] [3] [4] [5] [8]
12	Simon de Graaf	[26]
13	Harmke de Groot	[22]
14	José Pineda de Gyvez	[23]
15	Thijmen Hamoen	[19]
16	Pieter Harpe	[22] [27]
17	Kees-Jan van der Kolk	[14] [16] [24]
18	René van Leuken (Rene van Leuken)	[28]
19	Nuo Li	[15]
20	Ashish Nigam	[17] [25]
21	Ralph H. J. M. Otten	[13] [14]
22	Kathleen Philips	[22]
23	Eelco Schrik	[11] [12]
24	Luis Miguel Silveira (L. Miguel Silveira)	[24]
25	T. Smedes	[4] [6]
26	Qin Tang	[17] [18] [20] [21] [23] [25] [29] [30]
27	Jorge Fernandez Villena	[24]
28	Alejandro Viteri	[19]
29	Xiaoyan Wang	[22]
30	Cui Zhou	[22]
31	Amir Zjajo	[17] [18] [19] [20] [21] [23] [25] [28] [29] [30]

Colors in the list of coauthors

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