 | 2012 |
| 17 |  | Maurice Meijer,
José Pineda de Gyvez:
Body-Bias-Driven Design Strategy for Area- and Performance-Efficient CMOS Circuits.
IEEE Trans. VLSI Syst. 20(1): 42-51 (2012) |
| 2011 |
| 16 |  | Gerard Villar Pique,
Maurice Meijer:
A 350nA voltage regulator for 90nm CMOS digital circuits with Reverse-Body-Bias.
ESSCIRC 2011: 379-382 |
| 2010 |
| 15 |  | Maurice Meijer,
José Pineda de Gyvez,
Ben Kup,
Bert van Uden,
Peter Bastiaansen,
Marco Lammers,
Maarten Vertregt:
A forward body bias generator for digital CMOS circuits with supply voltage scaling.
ISCAS 2010: 2482-2485 |
| 14 |  | Maurice Meijer,
José Pineda de Gyvez:
Body bias driven design synthesis for optimum performance per area.
ISQED 2010: 472-477 |
| 13 |  | Maurice Meijer,
José Pineda de Gyvez,
Ajay Kapoor:
Ultra-Low-Power Digital Design with Body Biasing for Low Area and Performance-Efficient Operation.
J. Low Power Electronics 6(4): 521-532 (2010) |
| 2009 |
| 12 |  | Josep Rius,
Luis Elvira Villagra,
Maurice Meijer:
A Voltage-Mode Testing Method to Detect IDDQ Defects in Digital Circuits.
European Test Symposium 2009: 135-140 |
| 2007 |
| 11 |  | Sandeep Kumar Goel,
Maurice Meijer,
José Pineda de Gyvez:
Efficient testing and diagnosis of faulty power switches in SOCs.
IET Computers & Digital Techniques 1(3): 230-236 (2007) |
| 2006 |
| 10 |  | Maurice Meijer,
Rohini Krishnan,
Martijn T. Bennebroek:
Energy-efficient FPGA interconnect design.
DATE Designers' Forum 2006: 42-47 |
| 9 |  | Sandeep Kumar Goel,
Maurice Meijer,
José Pineda de Gyvez:
Testing and Diagnosis of Power Switches in SOCs.
European Test Symposium 2006: 145-150 |
| 8 |  | Josep Rius,
Maurice Meijer,
José Pineda de Gyvez:
An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits.
J. Low Power Electronics 2(1): 80-86 (2006) |
| 2005 |
| 7 |  | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Limits to performance spread tuning using adaptive voltage and body biasing.
ISCAS (1) 2005: 5-8 |
| 6 |  | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Glitch-free discretely programmable clock generation on chip.
ISCAS (2) 2005: 1839-1842 |
| 5 |  | Maurice Meijer,
José Pineda de Gyvez,
Ralph Otten:
On-chip digital power supply control for system-on-chip applications.
ISLPED 2005: 311-314 |
| 4 |  | Josep Rius,
José Pineda de Gyvez,
Maurice Meijer:
An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits.
PATMOS 2005: 187-196 |
| 3 |  | Atul Katoch,
Maurice Meijer,
Sanjeev K. Jain:
Active Noise Cancellation Using Aggressor-Aware Clamping Circuit for Robust On-Chip Communication.
VLSI Design 2005: 325-329 |
| 2004 |
| 2 |  | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Technology exploration for adaptive power and frequency scaling in 90nm CMOS.
ISLPED 2004: 14-19 |
| 1 |  | André K. Nieuwland,
Atul Katoch,
Maurice Meijer:
Reducing Cross-Talk Induced Power Consumption and Delay.
PATMOS 2004: 179-188 |