Farhad Mehdipour

	2012
22		Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki Murakami: Improving performance and energy efficiency of embedded processors via post-fabrication instruction set customization. The Journal of Supercomputing 60(2): 196-222 (2012)
	2011
21		Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, Koji Inoue, Kazuaki Murakami: Routing architecture and algorithms for a superconductivity circuits-based computing hardware. CCECE 2011: 977-980
20		Farhad Mehdipour, Hiroaki Honda, Koji Inoue, Hiroshi Kataoka, Kazuaki Murakami: A design scheme for a reconfigurable accelerator implemented by single-flux quantum circuits. Journal of Systems Architecture - Embedded Systems Design 57(1): 169-179 (2011)
	2010
19		Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, Koji Inoue, Irina Kataeva, Kazuaki Murakami, Hiroyuki Akaike, Akira Fujimaki: Mapping scientific applications on a large-scale data-path accelerator implemented by single-flux quantum (SFQ) circuits. DATE 2010: 993-996
	2009
18		Farhad Mehdipour, Hamid Noori, Bahman Javadi, Hiroaki Honda, Koji Inoue, Kazuaki Murakami: A combined analytical and simulation-based model for performance evaluation of a reconfigurable instruction set processor. ASP-DAC 2009: 564-569
17		Farhad Mehdipour, Hamid Noori, Koji Inoue, Kazuaki Murakami: Rapid Design Space Exploration of a Reconfigurable Instruction-Set Processor. IEICE Transactions 92-A(12): 3182-3192 (2009)
	2008
16		Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Koji Inoue, Kazuaki Murakami: Design space exploration for a coarse grain accelerator. ASP-DAC 2008: 685-690
15		Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki Murakami: Enhancing energy efficiency of processor-based embedded systems through post-fabrication ISA extension. ISLPED 2008: 241-246
14		Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki Murakami: A Reconfigurable Functional Unit with Conditional Execution for Multi-Exit Custom Instructions. IEICE Transactions 91-C(4): 497-508 (2008)
13		Hamid Noori, Farhad Mehdipour, Kazuaki Murakami, Koji Inoue, Morteza Saheb Zamani: An architecture framework for an adaptive extensible processor. The Journal of Supercomputing 45(3): 313-340 (2008)
	2007
12		Hamid Noori, Farhad Mehdipour, Kazuaki Murakami, Koji Inoue, Maziar Goudarzi: Interactive presentation: Generating and executing multi-exit custom instructions for an adaptive extensible processor. DATE 2007: 325-330
11		Hamid Noori, Farhad Mehdipour, Morteza Saheb Zamani, Koji Inoue, Kazuaki Murakami: Handling Control Data Flow Graphs for a Tightly Coupled Reconfigurable Accelerator. ICESS 2007: 249-260
10		Arash Mehdizadeh, Behnam Ghavami, Morteza Saheb Zamani, Hossein Pedram, Farhad Mehdipour: An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor. VLSI-SoC 2007: 151-156
9		Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Koji Inoue, Kazuaki Murakami: Improving Performance and Energy Saving in a Reconfigurable Processor via Accelerating Control Data Flow Graphs. IEICE Transactions 90-D(12): 1956-1966 (2007)
	2006
8		Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Kazuaki Murakami, Mehdi Sedighi, Koji Inoue: An Integrated Temporal Partitioning and Mapping Framework for Handling Custom Instructions on a Reconfigurable Functional Unit. Asia-Pacific Computer Systems Architecture Conference 2006: 219-230
7		Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi, Kazuaki Murakami, Hamid Noori: GifT: A Gravity-Directed and Life-Time Based Algorithm for Temporal Partitioning of Data Flow Graphs. ERSA 2006: 227-230
6		Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Kazuaki Murakami, Koji Inoue, Mehdi Sedighi: Custom Instruction Generation Using Temporal Partitioning Techniques for a Reconfigurable Functional Unit. EUC 2006: 722-731
5		Hamid Noori, Farhad Mehdipour, Kazuaki Murakami, Koji Inoue, Morteza Saheb Zamani: A Reconfigurable Functional Unit for an Adaptive Dynamic Extensible Processor. FPL 2006: 1-4
4		Farhad Mehdipour, Morteza Saheb Zamani, H. R. Ahmadifar, Mehdi Sedighi, Kazuaki Murakami: Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework. IPDPS 2006
3		Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi: An integrated temporal partitioning and physical design framework for static compilation of reconfigurable computing systems. Microprocessors and Microsystems 30(1): 52-62 (2006)
	2005
2		Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi: Reducing Inter-Configuration Memory Usage and Performance Improvement in Reconfigurable Computing Systems. DSD 2005: 372-378
1		Ali Valizadeh, Morteza Saheb Zamani, Babak Sadeghian, Farhad Mehdipour: A Reconfigurable Architecture for Implementing Multiple Cipher Algorithms. FPT 2005: 307-308

Coauthor Index

1	H. R. Ahmadifar	[4]
2	Hiroyuki Akaike	[19]
3	Akira Fujimaki	[19]
4	Behnam Ghavami	[10]
5	Maziar Goudarzi	[12]
6	Hiroaki Honda	[18] [19] [20] [21]
7	Koji Inoue	[5] [6] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22]
8	Bahman Javadi	[18]
9	Irina Kataeva	[19]
10	Hiroshi Kataoka	[19] [20] [21]
11	Arash Mehdizadeh	[10]
12	Kazuaki Murakami	[4] [5] [6] [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22]
13	Hamid Noori	[5] [6] [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [22]
14	Hossein Pedram	[10]
15	Babak Sadeghian	[1]
16	Mehdi Sedighi	[2] [3] [4] [6] [7] [8]
17	Ali Valizadeh	[1]
18	Morteza Saheb Zamani	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [13] [16]

Last update Sun Jun 3 16:06:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page