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| 2012 | ||
|---|---|---|
| 82 | Dhia Mahjoub, David W. Matula: Constructing efficient rotating backbones in wireless sensor networks using graph coloring. Computer Communications 35(9): 1086-1097 (2012) | |
| 2011 | ||
| 81 | David W. Matula, Mihai T. Panu: A Prescale-Lookup-Postscale Additive Procedure for Obtaining a Single Precision Ulp Accurate Reciprocal. IEEE Symposium on Computer Arithmetic 2011: 177-183 | |
| 2010 | ||
| 80 | Dhia Mahjoub, David W. Matula: Employing (1 - epsilon) Dominating Set Partitions as Backbones in Wireless Sensor Networks. ALENEX 2010: 98-111 | |
| 79 | Dhia Mahjoub, Angelika Leskovskaya, David W. Matula: Approximating the independent domatic partition problem in random geometric graphs - an experimental study. CCCG 2010: 195-198 | |
| 78 | Dhia Mahjoub, David W. Matula: Building (1 - epsilon) Dominating Sets Partition as Backbones in Wireless Sensor Networks Using Distributed Graph Coloring. DCOSS 2010: 144-157 | |
| 2009 | ||
| 77 | Satyendra R. Datla, Mitchell A. Thornton, David W. Matula: A Low Power High Performance Radix-4 Approximate Squaring Circuit. ASAP 2009: 91-97 | |
| 76 | David W. Matula: Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding. IEEE Symposium on Computer Arithmetic 2009: 39-47 | |
| 75 | Dhia Mahjoub, David W. Matula: Experimental Study of Independent and Dominating Sets in Wireless Sensor Networks Using Graph Coloring Algorithms. WASA 2009: 32-42 | |
| 74 | Alex Fit-Florea, Lun Li, Mitchell A. Thornton, David W. Matula: A Discrete Logarithm Number System for Integer Arithmetic Modulo 2k: Algorithms and Lookup Structures. IEEE Trans. Computers 58(2): 163-174 (2009) | |
| 2008 | ||
| 73 | David W. Matula: Foundations of Higher Radix Numeric Computation. ISMVL 2008: 124 | |
| 72 | Mitchell A. Thornton, David W. Matula, Laura Spenner, D. Michael Miller: Quantum Logic Implementation of Unary Arithmetic Operations. ISMVL 2008: 202-207 | |
| 2006 | ||
| 71 | Lun Li, Mitchell A. Thornton, David W. Matula: A digit serial algorithm for the integer power operation. ACM Great Lakes Symposium on VLSI 2006: 302-307 | |
| 70 | Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions. ASAP 2006: 99-104 | |
| 69 | David W. Matula, Lee D. McFearin: A formal model and efficient traversal algorithm for generating testbenches for verification of IEEE standard floating point division. DATE 2006: 1134-1138 | |
| 2005 | ||
| 68 | Alex Fit-Florea, David W. Matula: Determining all pairs edge connectivity of a 4-regular graph in O(|V|). AICCSA 2005: 15 | |
| 67 | David W. Matula, Alex Fit-Florea, Mitchell Aaron Thornton: Table Lookup Structures for Multiplicative Inverses Modulo 2k. IEEE Symposium on Computer Arithmetic 2005: 156-163 | |
| 66 | Peter Kornerup, David W. Matula: Single Precision Reciprocals by Multipartite Table Lookup. IEEE Symposium on Computer Arithmetic 2005: 240-248 | |
| 65 | Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2k. ISVLSI 2005: 130-135 | |
| 64 | Peter-Michael Seidel, Lee D. McFearin, David W. Matula: Secondary Radix Recodings for Higher Radix Multipliers. IEEE Trans. Computers 54(2): 111-123 (2005) | |
| 2004 | ||
| 63 | Alex Fit-Florea, David W. Matula: A Digit-Serial Algorithm for the Discrete Logarithm Modulo 2k. ASAP 2004: 236-246 | |
| 2003 | ||
| 62 | David W. Matula: Computer Arithmetic - An Algorithm Engineer?s Perspective. IEEE Symposium on Computer Arithmetic 2003: 2- | |
| 61 | David W. Matula, Alex Fit-Florea: Prescaled Integer Division. IEEE Symposium on Computer Arithmetic 2003: 63- | |
| 60 | David W. Matula, Lee D. McFearin: A p×p bit fraction model of binary floating point division and extremal rounding cases. Theor. Comput. Sci. 291(2): 159-182 (2003) | |
| 59 | Marc Daumas, David W. Matula: Further Reducing the Redundancy of a Notation Over a Minimally Redundant Digit Set. VLSI Signal Processing 33(1-2): 7-18 (2003) | |
| 2002 | ||
| 58 | David W. Matula, Alex Fit-Florea, Lee D. McFearin: Evaluating Products of Non Linear Functions by Indirect Bipartite Table Lookup. ASAP 2002: 120-129 | |
| 57 | Mihaela Iridon, David W. Matula: Regular Triangulated Toroidal Graphs with Applications to Cellular and Interconnection Networks. J. Graph Algorithms Appl. 6(4): 373-404 (2002) | |
| 2001 | ||
| 56 | Lee D. McFearin, David W. Matula: Selecting A Well Distributed Hard Case Test Suite for IEEE Standard Floating Point Division. ICCD 2001: 89-97 | |
| 55 | David W. Matula: Improved Table Lookup Algorithms for Postscaled Division. IEEE Symposium on Computer Arithmetic 2001: 101- | |
| 54 | Lee D. McFearin, David W. Matula: Generation and Analysis of Hard to Round Cases for Binary Floating Point Division. IEEE Symposium on Computer Arithmetic 2001: 119-127 | |
| 53 | Peter-Michael Seidel, Lee D. McFearin, David W. Matula: Binary Multiplication Radix-32 and Radix-256. IEEE Symposium on Computer Arithmetic 2001: 23-32 | |
| 52 | Mihaela Iridon, David W. Matula, Cheng Yang: A Graph Theoretic Approach for Channel Assignment in Cellular Networks. Wireless Networks 7(6): 567-574 (2001) | |
| 2000 | ||
| 51 | Marc Daumas, David W. Matula: A Booth Multiplier Accepting Both a Redundant or a Non-Redundant Input with No Additional Delay. ASAP 2000: 205-214 | |
| 50 | Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even: An IEEE Compliant Floating-Point Adder that Conforms with the Pipelined Packet-Forwarding Paradigm. IEEE Trans. Computers 49(1): 33-47 (2000) | |
| 49 | Milos D. Ercegovac, Laurent Imbert, David W. Matula, Jean-Michel Muller, Guoheng Wei: Improving Goldschmidt Division, Square Root, and Square Root Reciprocal. IEEE Trans. Computers 49(7): 759-763 (2000) | |
| 1999 | ||
| 48 | Hakki C. Cankaya, David W. Matula, Mihaela Iridon: Performance Analysis of a Graph Model for Channel Assignment in a Cellular Network. COMPSAC 1999: 239- | |
| 47 | Cristina Iordache, David W. Matula: On Infinitely Precise Rounding for Division, Square Root, Reciprocal and Square Root Reciprocal. IEEE Symposium on Computer Arithmetic 1999: 233-240 | |
| 46 | Abbas Edalat, David W. Matula, Philipp Sünderhauf: Preface. Electr. Notes Theor. Comput. Sci. 24: 1 (1999) | |
| 45 | Cristina Iordache, David W. Matula: Analysis of Reciprocal and Square Root Reciprocal Instructions in the AMD K6-2 Implementation of 3DNow! Electr. Notes Theor. Comput. Sci. 24: 34-62 (1999) | |
| 1998 | ||
| 44 | Mihaela Iridon, David W. Matula: Symmetric Cellular Network Embeddings on a Torus. ICCCN 1998: 732-736 | |
| 1997 | ||
| 43 | David W. Matula, Asger Munk Nielsen: Pipelined Packet-Forwarding Floating Point: I. Foundations and a Rounder. IEEE Symposium on Computer Arithmetic 1997: 140-147 | |
| 42 | Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even: Pipelined Packet-Forwarding Floating Point: II. An Adder. IEEE Symposium on Computer Arithmetic 1997: 148-155 | |
| 41 | Debjit Das Sarma, David W. Matula: Faithful Interpolation in Reciprocal Tables. IEEE Symposium on Computer Arithmetic 1997: 82-91 | |
| 40 | Marc Daumas, David W. Matula: Validated Roundings of Dot Products by Sticky Accumulation. IEEE Trans. Computers 46(5): 623-629 (1997) | |
| 1995 | ||
| 39 | Debjit Das Sarma, David W. Matula: Faithful Bipartite ROM Reciprocal Tables. IEEE Symposium on Computer Arithmetic 1995: 17- | |
| 38 | Chung Nan Lyu, David W. Matula: Redundant Binary Booth Recoding. IEEE Symposium on Computer Arithmetic 1995: 50- | |
| 37 | Peter Kornerup, David W. Matula: LCF: A Lexicagraphic Binary representation of the Rationals. J. UCS 1(7): 484-503 (1995) | |
| 1994 | ||
| 36 | Debjit Das Sarma, David W. Matula: Measuring the Accuracy of ROM Reciprocal Tables. IEEE Trans. Computers 43(8): 932-940 (1994) | |
| 1993 | ||
| 35 | W. S. Briggs, David W. Matula: A 17 × 69 bit multiply and add unit with redundant binary feedback and single cycle latency. IEEE Symposium on Computer Arithmetic 1993: 163-170 | |
| 34 | Marc Daumas, David W. Matula: Design of a fast validated dot product operation. IEEE Symposium on Computer Arithmetic 1993: 62-69 | |
| 33 | Debjit Das Sarma, David W. Matula: Measuring the accuracy of ROM reciprocal tables. IEEE Symposium on Computer Arithmetic 1993: 95-102 | |
| 32 | David W. Matula: A Linear Time 2+epsilon Approximation Algorithm for Edge Connectivity. SODA 1993: 500-504 | |
| 1991 | ||
| 31 | Gerd Bohlender, Wolfgang Walter, Peter Kornerup, David W. Matula: Semantics for exact floating point operations. IEEE Symposium on Computer Arithmetic 1991: 22-26 | |
| 30 | Shrikant N. Parikh, David W. Matula: A redundant binary Euclidean GCD algorithm. IEEE Symposium on Computer Arithmetic 1991: 220-225 | |
| 1990 | ||
| 29 | David W. Matula: Design of a highly parallel IEEE standard floating point unit: the Cyrix 83D87 coprocessor. SPDP 1990: 334 | |
| 28 | David W. Matula, Farhad Shahrokhi: Sparsest cuts and bottlenecks in graphs. Discrete Applied Mathematics 27(1-2): 113-123 (1990) | |
| 27 | Peter Kornerup, David W. Matula: An Algorithm for Redundant Binary Bit-Pipelined Rational Arithmetic. IEEE Trans. Computers 39(8): 1106-1115 (1990) | |
| 26 | Farhad Shahrokhi, David W. Matula: The Maximum Concurrent Flow Problem J. ACM 37(2): 318-334 (1990) | |
| 1989 | ||
| 25 | Peter Kornerup, David W. Matula: Exploiting redundancy in bit-pipelined rational arithmetic. IEEE Symposium on Computer Arithmetic 1989: 119-126 | |
| 1988 | ||
| 24 | Peter Kornerup, David W. Matula: An On-Line Arithmetic Unit for Bit-Pipelined Rational Arithmetic. J. Parallel Distrib. Comput. 5(3): 310-330 (1988) | |
| 1987 | ||
| 23 | Farhad Shahrokhi, David W. Matula: On solving large maximum concurrent flow problems. ACM Conference on Computer Science 1987: 205-209 | |
| 22 | David W. Matula: Determining Edge Connectivity in O(nm) FOCS 1987: 249-251 | |
| 21 | Peter Kornerup, David W. Matula: A bit-serial arithmetic unit for rational arithmetic. IEEE Symposium on Computer Arithmetic 1987: 204-211 | |
| 20 | David W. Matula: Expose-and-merge exploration and the chromatic number of random graph. Combinatorica 7(3): 275-284 (1987) | |
| 1986 | ||
| 19 | Jit Biswas, David W. Matula: Two Flow Routing Algorithms for the Maximum Concurrent-Flow Problem. FJCC 1986: 629-636 | |
| 1985 | ||
| 18 | Peter Kornerup, David W. Matula: Finite precision lexicographic continued fraction number systems. IEEE Symposium on Computer Arithmetic 1985: 207-213 | |
| 17 | David W. Matula, Peter Kornerup: Finite Precision Rational Arithmetic Slash Number Systems. IEEE Trans. Computers 34(1): 3-18 (1985) | |
| 1983 | ||
| 16 | David W. Matula, Peter Kornerup: An order preserving finite binary encoding of the rationals. IEEE Symposium on Computer Arithmetic 1983: 201-209 | |
| 15 | Peter Kornerup, David W. Matula: Finite Precision Rational Arithmetic: An Arithmetic Unit. IEEE Trans. Computers 32(4): 378-388 (1983) | |
| 14 | David W. Matula, Leland L. Beck: Smallest-Last Ordering and clustering and Graph Coloring Algorithms J. ACM 30(3): 417-427 (1983) | |
| 1982 | ||
| 13 | David W. Matula: Basic digit sets for radix representation. J. ACM 29(4): 1131-1143 (1982) | |
| 1981 | ||
| 12 | Peter Kornerup, David W. Matula: An integrated rational arithmetic unit. IEEE Symposium on Computer Arithmetic 1981: 233-240 | |
| 1979 | ||
| 11 | David W. Matula, Peter Kornerup: An approximate rational arithmetic system with intrinsic recovery of simple fractions during expression evaluation. EUROSAM 1979: 383-397 | |
| 1978 | ||
| 10 | David W. Matula: Basic digit sets for radix representation of the integers. IEEE Symposium on Computer Arithmetic 1978: 1-9 | |
| 9 | David W. Matula, Peter Kornerup: A feasibility analysis of binary fixed-slash and floating-slash number systems. IEEE Symposium on Computer Arithmetic 1978: 29-38 | |
| 8 | Peter Kornerup, David W. Matula: A feasibility analysis of fixed-slash rational arithmetic. IEEE Symposium on Computer Arithmetic 1978: 39-47 | |
| 7 | David W. Matula: k-Blocks and ultrablocks in graphs. J. Comb. Theory, Ser. B 24(1): 1-13 (1978) | |
| 1975 | ||
| 6 | T. R. N. Rao, David W. Matula: 3rd IEEE Symposium on Computer Arithmetic, ARITH 1975, Dallas, TX, USA, November 19-20, 1975 IEEE 1975 | |
| 5 | Robert T. Gregory, David W. Matula: Base conversion in residue number systems. IEEE Symposium on Computer Arithmetic 1975: 117-125 | |
| 4 | David W. Matula: Fixed-slash and floating-slash rational arithmetic. IEEE Symposium on Computer Arithmetic 1975: 90-91 | |
| 1972 | ||
| 3 | John D. Marasa, David W. Matula: A simulative study of correlated error propagation in various finite arithmetics. IEEE Symposium on Computer Arithmetic 1972: 1-44 | |
| 1971 | ||
| 2 | David W. Matula: Significant Digits: Numerical Analysis or Numerology. IFIP Congress (2) 1971: 1278-1283 | |
| 1968 | ||
| 1 | David W. Matula: In-and-out conversions. Commun. ACM 11(1): 47-50 (1968) | |
Colors in the list of coauthors
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