 | 2011 |
| 13 |  | Yeonbok Lee,
Takeshi Matsumoto,
Masahiro Fujita:
On-chip dynamic signal sequence slicing for efficient post-silicon debugging.
ASP-DAC 2011: 719-724 |
| 12 |  | Tasuku Nishihara,
Takeshi Matsumoto,
Masahiro Fujita:
Multi-Level Bounded Model Checking with Symbolic Counterexamples.
IEICE Transactions 94-A(2): 696-705 (2011) |
| 11 |  | Yeonbok Lee,
Takeshi Matsumoto,
Masahiro Fujita:
An Automatic Method of Mapping I/O Sequences of Chip Execution onto High-level Design for Post-Silicon Debugging.
IEICE Transactions 94-A(7): 1519-1529 (2011) |
| 2010 |
| 10 |  | Yeonbok Lee,
Takeshi Matsumoto,
Masahiro Fujita:
Generation of I/O sequences for a high-level design from those in post-silicon for efficient post-silicon debugging.
ICCD 2010: 402-408 |
| 9 |  | William Newman,
David Franzel,
Takeshi Matsumoto,
Richard Leibbrandt,
Trent W. Lewis,
Martin H. Luerssen,
David M. W. Powers:
Hybrid world object tracking for a virtual teaching agent.
IJCNN 2010: 1-9 |
| 8 |  | Masahiro Fujita,
Hideo Tanida,
Fei Gao,
Tasuku Nishihara,
Takeshi Matsumoto:
Synthesis and formal verification of on-chip protocol transducers through decomposed specification.
ISQED 2010: 515-523 |
| 2009 |
| 7 |  | Yeonbok Lee,
Tasuku Nishihara,
Takeshi Matsumoto,
Masahiro Fujita:
A Post-Silicon Debug Support Using High-Level Design Description.
Asian Test Symposium 2009: 137-142 |
| 6 |  | Tasuku Nishihara,
Takeshi Matsumoto,
Masahiro Fujita:
Word-Level Equivalence Checking in Bit-Level Accuracy by Synthesizing Designs onto Identical Datapath.
IEICE Transactions 92-D(5): 972-984 (2009) |
| 2008 |
| 5 |  | Masahiro Fujita,
Takeshi Matsumoto,
Hiroaki Yoshida:
A HW/SW Co-Reuse Methodology Based on Design Refinement Templates in UML Diagrams.
ICSOFT (SE/MUSE/GSDCA) 2008: 240-245 |
| 2007 |
| 4 |  | Takeshi Matsumoto,
Daisuke Ando,
Tasuku Nishihara,
Masahiro Fujita:
Development and Verification of a Collaborative Printing Environment.
C5 2007: 99-108 |
| 2006 |
| 3 |  | Takeshi Matsumoto,
Hiroshi Saito,
Masahiro Fujita:
Equivalence Checking of C Programs by Locally Performing Symbolic Simulation on Dependence Graphs.
ISQED 2006: 370-375 |
| 2 |  | Toru Hyakutake,
Takeshi Matsumoto,
Shinichiro Yanase:
Lattice Boltzmann simulation of blood cell behavior at microvascular bifurcations.
Mathematics and Computers in Simulation 72(2-6): 134-140 (2006) |
| 2005 |
| 1 |  | Takeshi Matsumoto,
Hiroshi Saito,
Masahiro Fujita:
An Equivalence Checking Method for C Descriptions Based on Symbolic Simulation with Textual Differences.
IEICE Transactions 88-A(12): 3315-3323 (2005) |