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Sanu Mathew Coauthor index pubzone.org

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DBLP keys2012
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSteven Hsu, Amit Agarwal, Mark Anders, Sanu Mathew, Himanshu Kaul, Farhana Sheikh, Ram Krishnamurthy: A 280mV-to-1.1V 256b reconfigurable SIMD vector permutation engine with 2-dimensional shuffle in 22nm CMOS. ISSCC 2012: 178-180
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHimanshu Kaul, Mark Anders, Sanu Mathew, Steven Hsu, Amit Agarwal, Farhana Sheikh, Ram Krishnamurthy, Shekhar Borkar: A 1.45GHz 52-to-162GFLOPS/W variable-precision floating-point fused multiply-add unit with certainty tracking in 32nm CMOS. ISSCC 2012: 182-184
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFarhana Sheikh, Sanu Mathew, Mark Anders, Himanshu Kaul, Steven Hsu, Amit Agarwal, Ram Krishnamurthy, Shekhar Borkar: A 2.05GVertices/s 151mW lighting accelerator for 3D graphics vertex and pixel shading in 32nm CMOS. ISSCC 2012: 184-186
2011
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRam Krishnamurthy, Sanu Mathew, Farhana Sheikh: High-performance energy-efficient encryption in the sub-45nm CMOS Era. DAC 2011: 332
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAmit Agarwal, Steven Hsu, Sanu Mathew, Mark Anders, Himanshu Kaul, Farhana Sheikh, Ram Krishnamurthy: A 128×128b high-speed wide-and match-line content addressable memory in 32nm CMOS. ESSCIRC 2011: 83-86
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSanu Mathew, Farhana Sheikh, Michael E. Kounavis, Shay Gueron, Amit Agarwal, Steven Hsu, Himanshu Kaul, Mark Anders, Ram Krishnamurthy: 53 Gbps Native GF(2 4) 2 Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors. J. Solid-State Circuits 46(4): 767-776 (2011)
2010
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMark Anders, Himanshu Kaul, Steven Hsu, Amit Agarwal, Sanu Mathew, Farhana Sheikh, Ram Krishnamurthy, Shekhar Borkar: A 4.1Tb/s bisection-bandwidth 560Gb/s/W streaming circuit-switched 8×8 mesh network-on-chip in 45nm CMOS. ISSCC 2010: 110-111
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAmit Agarwal, Sanu Mathew, Steven Hsu, Mark Anders, Himanshu Kaul, Farhana Sheikh, Rajaraman Ramanarayanan, Suresh Srinivasan, Ram Krishnamurthy, Shekhar Borkar: A 320mV-to-1.2V on-die fine-grained reconfigurable fabric for DSP/media accelerators in 32nm CMOS. ISSCC 2010: 328-329
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHimanshu Kaul, Mark Anders, Sanu Mathew, Steven Hsu, Amit Agarwal, Ram Krishnamurthy, Shekhar Borkar: A 300 mV 494GOPS/W Reconfigurable Dual-Supply 4-Way SIMD Vector Processing Accelerator in 45 nm CMOS. J. Solid-State Circuits 45(1): 95-102 (2010)
2009
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHimanshu Kaul, Mark Anders, Sanu Mathew, Steven Hsu, Amit Agarwal, Ram Krishnamurthy, Shekhar Borkar: A 300mV 494GOPS/W reconfigurable dual-supply 4-Way SIMD vector processing accelerator in 45nm CMOS. ISSCC 2009: 260-261
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSuresh Srinivasan, Sanu Mathew, Vasantha Erraguntla, Ram Krishnamurthy: A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS. VLSI Design 2009: 301-306
2008
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRajaraman Ramanarayanan, Sanu Mathew, Vasantha Erraguntla, Ram Krishnamurthy, Shay Gueron: A 2.1GHz 6.5mW 64-bit Unified PopCount/BitScan Datapath Unit for 65nm High-Performance Microprocessor Execution Cores. VLSI Design 2008: 273-278
2007
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSanu Mathew, David Harris, Mark Anders, Steven Hsu, Ram Krishnamurthy: A 2.4GHz 256/1024-bit Encryption Accelerator reconfigurable Montgomery multiplier in 90nm CMOS. SoCC 2007: 25-28
2005
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Harris, Ram Krishnamurthy, Mark Anders, Sanu Mathew, Steven Hsu: An Improved Unified Scalable Radix-2 Montgomery Multiplier. IEEE Symposium on Computer Arithmetic 2005: 172-178
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy: Comparison of high-performance VLSI adders in the energy-delay space. IEEE Trans. VLSI Syst. 13(6): 754-758 (2005)
2003
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy: Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders. IEEE Symposium on Computer Arithmetic 2003: 272-279

Coauthor Index

1Amit Agarwal [7] [8] [9] [10] [11] [12] [14] [15] [16]
2Mark Anders [3] [4] [7] [8] [9] [10] [11] [12] [14] [15] [16]
3Shekhar Y. Borkar (Shekhar Borkar) [7] [8] [9] [10] [14] [15]
4Hoang Q. Dao [1] [2]
5Vasantha Erraguntla [5] [6]
6Shay Gueron [5] [11]
7David Harris [3] [4]
8Steven Hsu [3] [4] [7] [8] [9] [10] [11] [12] [14] [15] [16]
9Himanshu Kaul [7] [8] [9] [10] [11] [12] [14] [15] [16]
10Michael E. Kounavis [11]
11Ram Krishnamurthy [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
12Vojin G. Oklobdzija [1] [2]
13Rajaraman Ramanarayanan [5] [9]
14Farhana Sheikh [9] [10] [11] [12] [13] [14] [15] [16]
15Suresh Srinivasan [6] [9]
16Bart R. Zeydel [1] [2]

Last update Sun Jun 3 16:06:10 2012 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page