Kimihiko Masuda

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2008

2 Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara: Test Scheduling for Multi-Clock Domain SoCs under Power Constraint. IEICE Transactions 91-D(3): 747-755 (2008)

2006

1 Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara: Power-constrained test scheduling for multi-clock domain SoCs. DATE 2006: 297-302

	2008
2		Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara: Test Scheduling for Multi-Clock Domain SoCs under Power Constraint. IEICE Transactions 91-D(3): 747-755 (2008)
	2006
1		Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara: Power-constrained test scheduling for multi-clock domain SoCs. DATE 2006: 297-302

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