Oleg Maslennikov

Oleg Maslennikow

Technical University of Koszalin, Poland

	2009
14		Piotr Ratuszniak, Oleg Maslennikow: New conception and algorithm of allocation mapping for processor arrays implemented into multi-context FPGA devices. IMCSIT 2009: 771-777
13		Anatolij Sergiyenko, Oleg Maslennikow, Piotr Ratuszniak, Natalia Maslennikowa, Adam Tomas: Application Specific Processors for the Autoregressive Signal Analysis. PPAM (1) 2009: 80-86
	2007
12		Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko, Adam Tomas, Roman Wyrzykowski: Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor. PPAM 2007: 137-147
	2006
11		Oleg Maslennikow, Anatoli Sergyienko: Mapping DSP Algorithms into FPGA. PARELEC 2006: 208-213
	2005
10		Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko: FPGA Implementation of the Conjugate Gradient Method. PPAM 2005: 526-533
	2003
9		Oleg Maslennikow, Juri Shevtshenko, Anatoli Sergyienko: Configurable Microprocessor Array for DSP Applications. PPAM 2003: 36-41
	2002
8		Oleg Maslennikov, Juri Shevtshenko, Anatoli Sergyienko: Configurable Microcontroller Array. PARELEC 2002: 47-49
	2001
7		Oleg Maslennikov: Systematic Generation of Executing Programs for Processor Elements in Parallel ASIC or FPGA-Based Systems and Their Transformation into VHDL-Descriptions of Processor Element Control Units. PPAM 2001: 272-279
6		Anatoli Sergyienko, Oleg Maslennikov: Implementation of Givens QR-Decomposition in FPGA. PPAM 2001: 458-465
	1998
5		Anatoli Sergyienko, Juri Kanevski, Oleg Maslennikov, Roman Wyrzykowski: A Method for Mapping DSP Algorithms into Application Specific Structures. EUROMICRO 1998: 10365-
4		Oleg Maslennikow, Juri Kaniewski, Roman Wyrzykowski: Fault Tolerant QR-Decomposition Algorithm and Its Parallel Implementation. Euro-Par 1998: 798-803
	1997
3		Roman Wyrzykowski, Juri Kanevski, Oleg Maslennikov: A new orthogonal version of the Gauss-Jordan algorithm and its parallel implementation. PDP 1997: 445-452
	1996
2		Juri Kanevski, Oleg Maslennikov, Roman Wyrzykowski: Algorithm-Based Fault Tolerant Solution of Linear Systems on Processor Arrays. Parcella 1996: 165-173
1		Juri Kanevski, Oleg Maslennikov, Anatoli Sergyienko: Processor Array for Signal Computing and Numerical Applications. Parcella 1996: 47-58

Coauthor Index

1	Juri Kanevski	[1] [2] [3] [5]
2	Juri Kaniewski	[4]
3	Volodymyr Lepekha	[10] [12]
4	Natalia Maslennikowa	[13]
5	Piotr Ratuszniak	[13] [14]
6	Anatolij Sergiyenko	[13]
7	Anatoli Sergyienko	[1] [5] [6] [8] [9] [10] [11] [12]
8	Juri Shevtshenko	[8] [9]
9	Adam Tomas	[12] [13]
10	Roman Wyrzykowski	[2] [3] [4] [5] [12]

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