 | 2010 |
|---|
| 9 |       | Guillermo Payá Vayá,
Javier Martín-Langerwerf,
Holger Blume,
Peter Pirsch:
A forwarding-sensitive instruction scheduling approach to reduce register file constraints in VLIW architectures.
ASAP 2010: 151-158 |
| 8 | | Guillermo Payá Vayá,
Javier Martín-Langerwerf,
Peter Pirsch:
A Multi-Shared Register File Structure for VLIW Processors.
Signal Processing Systems 58(2): 215-231 (2010) |
| 2009 |
|---|
| 7 | | Guillermo Payá Vayá,
Javier Martín-Langerwerf,
Sören Moch,
Peter Pirsch:
An Enhanced DMA Controller in SIMD Processors for Video Applications.
ARCS 2009: 159-170 |
| 2007 |
|---|
| 6 | | Guillermo Payá Vayá,
Javier Martín-Langerwerf,
Piriya Taptimthong,
Peter Pirsch:
Design Space Exploration of Media Processors: A Generic VLIW Architecture and a Parameterized Scheduler.
ARCS 2007: 254-267 |
| 5 | | Guillermo Payá Vayá,
Javier Martín-Langerwerf,
Peter Pirsch:
RAPANUI: A case study in Rapid Prototyping for Multiprocessor System-on-Chip.
DSD 2007: 215-221 |
| 4 | | Guillermo Payá Vayá,
Javier Martín-Langerwerf,
Piriya Taptimthong,
Peter Pirsch:
Design Space Exploration of Media Processors: A Parameterized Scheduler.
ICSAMOS 2007: 41-49 |
| 2005 |
|---|
| 3 | | Guillermo Payá Vayá,
Javier Martín-Langerwerf,
Peter Pirsch:
RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration.
SAMOS 2005: 32-40 |
| 2004 |
|---|
| 2 | | Carsten Reuter,
Javier Martín-Langerwerf,
Hans-Joachim Stolberg,
Peter Pirsch:
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms.
SAMOS 2004: 69-77 |
| 2002 |
|---|
| 1 | | Javier Martín-Langerwerf,
Carsten Reuter,
Holger Kropp,
Peter Pirsch:
Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications.
IEEE International Workshop on Rapid System Prototyping 2002: 60-65 |
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