Alberto Macii

	2012
84		Alessandro Sassone, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino, Rich Goldman, Vazgen Melikyan, Eduard Babayan, Salvatore Rinaudo: Investigating the effects of Inverted Temperature Dependence (ITD) on clock distribution networks. DATE 2012: 165-166
	2011
83		Salvatore Rinaudo, Giuliana Gangemi, Andrea Calimera, Alberto Macii, Massimo Poncino: Moving to Green ICT: From stand-alone power-aware IC design to an integrated approach to energy efficient design for heterogeneous electronic systems. DATE 2011: 1127-1128
82		Hossein Karimiyan, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino: An On-Chip All-Digital PV-Monitoring Architecture for Digital IPs. PATMOS 2011: 162-172
81		Karthikeyan Lingasubramanian, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino: Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating. PATMOS 2011: 214-225
80		Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Fast Computation of Discharge Current Upper Bounds for Clustered Power Gating. IEEE Trans. VLSI Syst. 19(1): 146-151 (2011)
79		Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits. IEEE Trans. VLSI Syst. 19(3): 469-482 (2011)
	2010
78		Andrea Acquaviva, Andrea Calimera, Alberto Macii, Massimo Poncino, Enrico Macii, Matteo Giaconia, Claudio Parrella: An integrated thermal estimation framework for industrial embedded platforms. ACM Great Lakes Symposium on VLSI 2010: 293-298
77		Alberto Bonanno, Alberto Bocca, Alberto Macii, Enrico Macii: Power-aware partitioning of data converters. VLSI-SoC 2010: 358-363
76		Ashutosh Chakraborty, Karthik Duraisami, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. IEEE Trans. on Circuits and Systems 57-I(10): 2741-2752 (2010)
75		Luca Benini, Alberto Bocca, Alberto Bonanno, Alberto Macii, Enrico Macii, Jean-Luc Nagel, Christian Piguet, Massimo Poncino: A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits. J. Low Power Electronics 6(1): 44-55 (2010)
	2009
74		Leticia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino: Enabling concurrent clock and power gating in an industrial design flow. DATE 2009: 334-339
73		Leticia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino: Placement-aware Clustering for Integrated Clock and Power Gating. ISCAS 2009: 1723-1726
72		Gaurang Upasani, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino: Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering. PATMOS 2009: 227-236
71		Alberto Bonanno, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino: Data-Driven Clock Gating for Digital Filters. PATMOS 2009: 96-105
70		Andrea Calimera, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits. IEEE Trans. on Circuits and Systems 56-I(9): 1979-1993 (2009)
69		Prassanna Sithambaram, Alberto Macii, Enrico Macii: Enhanced switching activity balancing encoding schemes for uniform temperature distribution in on-chip buses. J. Embedded Computing 3(3): 155-165 (2009)
68		Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating. J. Low Power Electronics 5(1): 113-121 (2009)
	2008
67		Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Optimal sleep transistor synthesis under timing and area constraints. ACM Great Lakes Symposium on VLSI 2008: 177-182
66		Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: A Scalable Algorithmic Framework for Row-Based Power-Gating. DATE 2008: 379-384
65		Enrico Macii, Leticia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Massimo Poncino: Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits. DSD 2008: 298-303
64		Ashoka Visweswara Sathanur, Andrea Calimera, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits. ISCAS 2008: 2761-2764
63		Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Multiple power-gating domain (multi-VGND) architecture for improved leakage power reduction. ISLPED 2008: 51-56
62		Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating. PATMOS 2008: 42-51
61		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. IEEE Trans. VLSI Syst. 16(6): 639-649 (2008)
60		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. Integration 41(1): 2-8 (2008)
59		Andrea Calimera, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, R. Iris Bahar, Alberto Macii, Enrico Macii, Massimo Poncino: Thermal-Aware Design Techniques for Nanometer CMOS Circuits. J. Low Power Electronics 4(3): 374-384 (2008)
	2007
58		Andrea Calimera, Antonio Pullini, Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. ACM Great Lakes Symposium on VLSI 2007: 501-504
57		Ashoka Visweswara Sathanur, Andrea Calimera, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing. DATE 2007: 1544-1549
56		Karthik Duraisami, Prassanna Sithambaram, Ashoka Visweswara Sathanur, Alberto Macii, Enrico Macii, Massimo Poncino: Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. ISCAS 2007: 1061-1064
55		Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Timing-driven row-based power gating. ISLPED 2007: 104-109
54		Prassanna Sithambaram, Alberto Macii, Enrico Macii: New Adaptive Encoding Schemes for Switching Activity Balancing in On-Chip Buses. PATMOS 2007: 232-241
	2006
53		Ashutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino: Thermal resilient bounded-skew clock tree optimization methodology. DATE 2006: 832-837
52		Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Enabling fine-grain leakage management by voltage anchor insertion. DATE 2006: 868-873
51		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. ISCAS 2006
50		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic thermal clock skew compensation using tunable delay buffers. ISLPED 2006: 162-167
49		Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. PATMOS 2006: 214-224
	2005
48		Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Low-overhead state-retaining elements for low-leakage MTCMOS design. ACM Great Lakes Symposium on VLSI 2005: 367-370
47		Prassanna Sithambaram, Alberto Macii, Enrico Macii: Exploring the impact of architectural parameters on energy efficiency of application-specific block-enabled SRAMs. ACM Great Lakes Symposium on VLSI 2005: 377-380
46		Prassanna Sithambaram, Alberto Macii, Enrico Macii: Design and Implementation of a Memory Generator for Low-Energy Application-Specific Block-Enabled SRAMs. PATMOS 2005: 477-487
45		Alberto Macii: Low-power embedded systems. J. Embedded Computing 1(3): 303-304 (2005)
	2004
44		Luca Benini, Alessandro Ivaldi, Alberto Macii, Enrico Macii: Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning. DATE 2004: 698-699
43		Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Post-layout leakage power minimization based on distributed sleep transistor insertion. ISLPED 2004: 138-143
42		Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii: Memory energy minimization by data compression: algorithms, architectures and implementation. IEEE Trans. VLSI Syst. 12(3): 255-268 (2004)
	2003
41		Luca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Massimo Poncino, Fabrizio Pro: A novel architecture for power maskable arithmetic units. ACM Great Lakes Symposium on VLSI 2003: 136-140
40		Luca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Fabrizio Pro, Massimo Poncino: Energy-aware design techniques for differential power analysis protection. DAC 2003: 36-41
39		Alberto Macii, Enrico Macii, Massimo Poncino: Improving the Efficiency of Memory Partitioning by Address Clustering. DATE 2003: 10018-10023
38		Alberto Macii, Enrico Macii, Fabrizio Crudo, Roberto Zafalon: A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors. DATE 2003: 10024-10029
37		Alberto Macii, Enrico Macii, Massimo Poncino: Increasing the locality of memory access patterns by low-overhead hardware address relocation. ISCAS (5) 2003: 385-388
36		Luca Benini, Angelo Galati, Alberto Macii, Enrico Macii, Massimo Poncino: Energy-efficient data scrambling on memory-processor interfaces. ISLPED 2003: 26-29
35		Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii: Hardw are Implementation of Data Compression Algorithms for Memory Energy Optimization. ISVLSI 2003: 250-251
34		Maurizio Bruno, Alberto Macii, Massimo Poncino: A Statistic Power Model for Non-synthetic RTL Operators. PATMOS 2003: 208-218
33		Luca Benini, Alberto Macii, Massimo Poncino: Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques. ACM Trans. Embedded Comput. Syst. 2(1): 5-32 (2003)
32		Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii, Massimo Poncino: Discharge Current Steering for Battery Lifetime Optimization. IEEE Trans. Computers 52(8): 985-995 (2003)
31		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Scheduling battery usage in mobile systems. IEEE Trans. VLSI Syst. 11(6): 1136-1143 (2003)
	2002
30		Alberto Macii, Luca Benini, Massimo Poncino: Memory design techniques for low energy embedded systems. Kluwer 2002: I-VII, 1-144
29		Monica Donno, Luca Macchiarulo, Alberto Macii, Enrico Macii, Massimo Poncino: Enhanced clustered voltage scaling for low power. ACM Great Lakes Symposium on VLSI 2002: 18-23
28		Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii: Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors. DATE 2002: 449-453
27		Luca Benini, Davide Bruni, Bruno Riccò, Alberto Macii, Enrico Macii: An adaptive data compression scheme for memory traffic minimization in processor-based systems. ISCAS (4) 2002: 866-869
26		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Discharge current steering for battery lifetime optimization. ISLPED 2002: 118-123
25		Luca Benini, Alberto Macii, Enrico Macii: Offline Data Profiling Techniques to Enhance Memory Compression in Embedded Systems. PATMOS 2002: 314-322
24		Luca Benini, Luca Macchiarulo, Alberto Macii, Massimo Poncino: Layout-driven memory synthesis for embedded systems-on-chip. IEEE Trans. VLSI Syst. 10(2): 96-105 (2002)
23		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Minimizing memory access energy in embedded systems by selective instruction compression. IEEE Trans. VLSI Syst. 10(5): 521-531 (2002)
	2001
22		Luca Benini, Luca Macchiarulo, Alberto Macii, Enrico Macii, Massimo Poncino: From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip. DAC 2001: 784-789
21		Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Extending lifetime of portable systems by battery scheduling. DATE 2001: 197-203
20		Luca Benini, Alberto Macii, Alberto Nannarelli: Cached-code compression for energy minimization in embedded processors. ISLPED 2001: 322-327
19		Luca Benini, Giuliano Castelli, Alberto Macii, Riccardo Scarsi: Battery-Driven Dynamic Power Management. IEEE Design & Test of Computers 18(2): 53-60 (2001)
18		Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Stream synthesis for efficient power simulation based on spectral transforms. IEEE Trans. VLSI Syst. 9(3): 417-426 (2001)
17		Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Discrete-time battery models for system-level low-power design. IEEE Trans. VLSI Syst. 9(5): 630-640 (2001)
	2000
16		Luca Benini, Marco Ferrero, Alberto Macii, Enrico Macii, Massimo Poncino: Supporting system-level power exploration for DSP applications. ACM Great Lakes Symposium on VLSI 2000: 17-22
15		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Synthesis of application-specific memories for power optimization in embedded systems. DAC 2000: 300-303
14		Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: A Discrete-Time Battery Model for High-Level Power Estimation. DATE 2000: 35-39
13		Luca Benini, Alberto Macii, Massimo Poncino: A recursive algorithm for low-power memory partitioning. ISLPED 2000: 78-83
12		Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Riccardo Scarsi: Battery-Driven Dynamic Power Management of Portable Systems. ISSS 2000: 25-33
11		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation. IEEE Design & Test of Computers 17(2): 74-85 (2000)
10		Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Glitch power minimization by selective gate freezing. IEEE Trans. VLSI Syst. 8(3): 287-298 (2000)
9		Luca Benini, Alberto Macii, Massimo Poncino, Riccardo Scarsi: Architectures and synthesis algorithms for power-efficient businterfaces. IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 969-980 (2000)
	1999
8		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. DAC 1999: 128-133
7		Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Glitch Power Minimization by Gate Freezing. DATE 1999: 163-167
6		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems. EUROMICRO 1999: 1311-1317
5		Alberto Macii, Enrico Macii, Giuseppe Odasso, Massimo Poncino, Riccardo Scarsi: Regression-Based Macromodeling for Delay Estimation of Behavioral Components. Great Lakes Symposium on VLSI 1999: 188-191
4		Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Selective instruction compression for memory energy reduction in embedded systems. ISLPED 1999: 206-211
	1998
3		Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino: Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. Great Lakes Symposium on VLSI 1998: 8-12
2		Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi: Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. ICCAD 1998: 235-241
1		Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Stream synthesis for efficient power simulation based on spectral transforms. ISLPED 1998: 30-35

Coauthor Index

1	Andrea Acquaviva	[78]
2	Eduard Babayan	[84]
3	Pietro Babighian	[43] [48] [52]
4	R. Iris Bahar	[59]
5	Luca Benini	[3] [4] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [30] [31] [32] [33] [35] [36] [40] [41] [42] [43] [44] [48] [50] [52] [55] [57] [58] [61] [62] [63] [64] [66] [67] [68] [70] [75] [79] [80]
6	Alberto Bocca	[71] [75] [77]
7	Leticia Maria Veiras Bolzani (Leticia Maria Veiras Bolzani Poehls)	[65] [73] [74]
8	Alberto Bonanno	[71] [75] [77]
9	Davide Bruni	[27] [28] [32] [35] [42]
10	Maurizio Bruno	[34]
11	Andrea Calimera	[57] [58] [59] [64] [65] [70] [72] [73] [74] [78] [81] [82] [83] [84]
12	Giuliano Castelli	[12] [14] [17] [19] [21]
13	Ashutosh Chakraborty	[49] [50] [51] [53] [60] [61] [76]
14	Fabrizio Crudo	[38]
15	Monica Donno	[29]
16	Karthik Duraisami	[49] [50] [51] [53] [56] [59] [60] [61] [76]
17	Fabrizio Ferrandi	[2]
18	Marco Ferrero	[16]
19	Angelo Galati	[36]
20	Giuliana Gangemi	[83]
21	Matteo Giaconia	[78]
22	Rich Goldman	[84]
23	Alessandro Ivaldi	[44]
24	Hossein Karimiyan	[82]
25	Karthikeyan Lingasubramanian	[81]
26	Luca Macchiarulo	[22] [24] [29]
27	Enrico Macii	[1] [2] [3] [4] [5] [6] [7] [8] [10] [11] [12] [14] [15] [16] [17] [18] [21] [22] [23] [25] [26] [27] [28] [29] [31] [32] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55] [56] [57] [58] [59] [60] [61] [62] [63] [64] [65] [66] [67] [68] [69] [70] [71] [72] [73] [74] [75] [76] [77] [78] [79] [80] [81] [82] [84]
28	Vazgen Melikyan	[84]
29	Giovanni De Micheli	[3] [7] [10]
30	Jean-Luc Nagel	[75]
31	Alberto Nannarelli	[20]
32	Giuseppe Odasso	[5]
33	Elvira Omerbegovic	[40] [41]
34	Claudio Parrella	[78]
35	Christian Piguet	[75]
36	Massimo Poncino	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [16] [17] [18] [21] [22] [23] [24] [26] [29] [30] [31] [32] [33] [34] [36] [37] [39] [40] [41] [49] [50] [51] [53] [55] [56] [57] [58] [59] [60] [61] [62] [63] [64] [65] [66] [67] [68] [70] [71] [72] [73] [74] [75] [76] [78] [79] [80] [81] [82] [83] [84]
37	Fabrizio Pro	[40] [41]
38	Antonio Pullini	[55] [58] [64] [66] [67]
39	Bruno Riccò	[27]
40	Salvatore Rinaudo	[83] [84]
41	Alessandro Sassone	[84]
42	Ashoka Visweswara Sathanur	[49] [50] [51] [55] [56] [57] [58] [59] [60] [61] [62] [63] [64] [66] [67] [68] [79] [80]
43	Riccardo Scarsi	[1] [2] [5] [7] [8] [9] [10] [12] [14] [17] [18] [19] [21] [31]
44	Prassanna Sithambaram	[46] [47] [49] [50] [51] [53] [54] [56] [59] [60] [61] [69] [76]
45	Fabio Somenzi	[2]
46	Gaurang Upasani	[72]
47	Roberto Zafalon	[38]

Last update Sun Jun 3 16:06:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page