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| 2011 | ||
|---|---|---|
| 7 | David R. Lutz: Fused Multiply-Add Microarchitecture Comprising Separate Early-Normalizing Multiply and Add Pipelines. IEEE Symposium on Computer Arithmetic 2011: 123-128 | |
| 2003 | ||
| 6 | David R. Lutz, Chris N. Hinds: Performance of the Floating-Point AMR Encoder on a Commercial Single-Issue Vector Processor. ESTImedia 2003: 94-101 | |
| 1999 | ||
| 5 | David R. Lutz, B. Kahne: Performance analysis for chipsets and systems. IPCCC 1999: 445-450 | |
| 1997 | ||
| 4 | David R. Lutz, D. N. Jayasimha: The Half-Adder Form and Early Branch Condition Resolution. IEEE Symposium on Computer Arithmetic 1997: 266-273 | |
| 1996 | ||
| 3 | David R. Lutz, D. N. Jayasimha: Early Zero Detection. ICCD 1996: 545- | |
| 1995 | ||
| 2 | David R. Lutz, D. N. Jayasimha: Do Fixed-Processor Communication-Time Tradeoffs Exist? Parallel Processing Letters 5: 311-320 (1995) | |
| 1991 | ||
| 1 | David R. Lutz, D. N. Jayasimha: What is an effective schedule? SPDP 1991: 158-161 | |
| 1 | Chris N. Hinds | [6] |
| 2 | D. N. Jayasimha | [1] [2] [3] [4] |
| 3 | B. Kahne | [5] |
Colors in the list of coauthors
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