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| 2010 | ||
|---|---|---|
| 3 | Shien-Chun Luo, Lih-Yih Chiou: A Sub-200-mV Voltage-Scalable SRAM With Tolerance of Access Failure by Self-Activated Bitline Sensing. IEEE Trans. on Circuits and Systems 57-II(6): 440-445 (2010) | |
| 2009 | ||
| 2 | Lih-Yih Chiou, Shien-Chun Luo: Energy-Efficient Dual-Edge-Triggered Level Converting Flip Flops With Symmetry in Setup Times and Insensitivity to Output Parasitics. IEEE Trans. VLSI Syst. 17(11): 1659-1663 (2009) | |
| 2007 | ||
| 1 | Lih-Yih Chiou, Shien-Chun Luo: An Energy-Efficient Dual-Edge Triggered Level-Converting Flip-Flop. ISCAS 2007: 1157-1160 | |
| 1 | Lih-Yih Chiou | [1] [2] [3] |
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