 | 2012 |
| 45 |  | Kai Qian,
Chia-Tien Dan Lo,
Yi Pan,
Yanqing Zhang,
Xiaolin Hu,
Liang Hong:
The cross-curriculum mobile computing labware for CS (abstract only).
SIGCSE 2012: 664 |
| 44 |  | Yi-Gang Tai,
Chia-Tien Dan Lo,
Kleanthis Psarris:
Accelerating Matrix Operations with Improved Deeply Pipelined Vector Reduction.
IEEE Trans. Parallel Distrib. Syst. 23(2): 202-210 (2012) |
| 2011 |
| 43 |  | Chia-Tien Dan Lo:
Performance-aware multicore programming.
ACM Southeast Regional Conference 2011: 126-131 |
| 42 |  | Chia-Tien Dan Lo,
Kai Qian,
Yan-Qing Zhang:
Teaching operating systems with simple low-cost portable energy efficient devices.
ACM Southeast Regional Conference 2011: 25-30 |
| 41 |  | Yi-Gang Tai,
Kleanthis Psarris,
Chia-Tien Dan Lo:
Synthesizing Tiled Matrix Decomposition on FPGAs.
FPL 2011: 464-469 |
| 40 |  | Chia-Tien Dan Lo,
Kai Qian,
Yanqing Zhang:
A Simple Low-Cost Portable Energy Efficient Device to Supplement Operating System Curriculum.
ICALT 2011: 76-77 |
| 2010 |
| 39 |  | Kai Qian,
Chia-Tien Dan Lo:
A novel embedded system curriculum with portable hands-on labs in a box.
ACM Southeast Regional Conference 2010: 53 |
| 38 |  | Kai Qian,
Chia-Tien Dan Lo:
Leveraging CS capstone project and green smart energy computing with WSN in a box.
ACM Southeast Regional Conference 2010: 84 |
| 37 |  | Chia-Tien Dan Lo,
Kai Qian:
Green Computing Methodology for Next Generation Computing Scientists.
COMPSAC 2010: 250-251 |
| 36 |  | Yi-Gang Tai,
Chia-Tien Dan Lo,
Kleanthis Psarris:
Multiple data set reduction on FPGAs.
FPT 2010: 45-52 |
| 35 |  | Chia-Tien Dan Lo,
Kai Qian,
Li Yang:
Innovative CS capstone projects on green energy applications with WSN in a box.
ITiCSE 2010: 307 |
| 34 |  | Kai Qian,
Chia-Tien Dan Lo,
Li Yang,
Jigang Liu:
Inquiry-based active learning in introductory programming courses.
ITiCSE 2010: 312 |
| 33 |  | Kai Qian,
Chia-Tien Dan Lo,
Xiaolin Hu:
Portable labs in a box for embedded system education.
ITiCSE 2010: 318 |
| 2009 |
| 32 |  | Yi-Gang Tai,
Chia-Tien Dan Lo,
Kleanthis Psarris:
An Improved Reduction Algorithm With Deeply Pipelined Operators.
SMC 2009: 3060-3065 |
| 31 |  | Wen-Jyi Hwang,
Huang-Chun Roan,
Ying-Nan Shih,
Chia-Tien Dan Lo,
Chien-Min Ou:
FPGA-based ROM-free network intrusion detection using shift-OR circuit.
J. Embedded Computing 3(2): 99-107 (2009) |
| 30 |  | Chia-Tien Dan Lo,
Yi-Gang Tai:
Space Optimization on Counters for FPGA-Based Perl Compatible Regular Expressions.
TRETS 2(4): (2009) |
| 2008 |
| 29 |  | Chia-Tien Dan Lo,
Yi-Gang Tai:
Highly Space Efficient Counters for Perl Compatible Regular Expressions in FPGAs.
ARC 2008: 51-62 |
| 28 |  | Yi-Gang Tai,
Chia-Tien Dan Lo,
Kleanthis Psarris:
Accelerating matrix decomposition with replications.
IPDPS 2008: 1-8 |
| 27 |  | Chia-Tien Dan Lo,
Yi-Gang Tai,
Kleanthis Psarris:
Hardware implementation for network intrusion detection rules with regular expression support.
SAC 2008: 1535-1539 |
| 26 |  | Huang-Chun Roan,
Wen-Jyi Hwang,
Wei-Jhih Huang,
Chia-Tien Dan Lo:
Network Intrusion Detection Based on Shift-OR Circuit.
J. Inf. Sci. Eng. 24(4): 1229-1239 (2008) |
| 2007 |
| 25 |  | Mayumi Kato,
Chia-Tien Dan Lo:
Compression for Low Power Consumption in Battery-powered Handsets.
DCC 2007: 386 |
| 24 |  | Yi-Gang Tai,
Chia-Tien Dan Lo,
Kleanthis Psarris:
Applying Out-of-Core QR Decomposition Algorithms on FPGA-Based Systems.
FPL 2007: 86-91 |
| 23 |  | Chia-Tien Dan Lo,
J. Morris Chang:
FPGA-based reconfigurable computing III.
Microprocessors and Microsystems 31(8): 475-476 (2007) |
| 2006 |
| 22 |  | Huang-Chun Roan,
Chien-Min Ou,
Wen-Jyi Hwang,
Chia-Tien Dan Lo:
Efficient Logic Circuit for Network Intrusion Detection.
EUC 2006: 776-784 |
| 21 |  | Huang-Chun Roan,
Wen-Jyi Hwang,
Chia-Tien Dan Lo:
Shift-Or Circuit for Efficient Network Intrusion Detection Pattern Matching.
FPL 2006: 1-6 |
| 2005 |
| 20 |  | Mayumi Kato,
Chia-Tien Dan Lo:
Hardware Solution to Java Compressed Heap.
FCCM 2005: 307-308 |
| 19 |  | Mayumi Kato,
Chia-Tien Dan Lo:
Impact of Java Compressed Heap on Mobile/Wireless Communication.
ITCC (2) 2005: 2-7 |
| 2004 |
| 18 |  | Mayumi Kato,
Chia-Tien Dan Lo:
Growing adaptation of computer science in Bioinfomatics.
ISICT 2004: 226-231 |
| 17 |  | Mayumi Kato,
Chia-Tien Dan Lo:
A heap de/compression module for wireless Java.
PPPJ 2004: 91-99 |
| 16 |  | Chia-Tien Dan Lo,
Witawas Srisa-an,
J. Morris Chang:
The design and analysis of a quantitative simulator for dynamic memory management
Journal of Systems and Software 72(3): 443-453 (2004) |
| 2003 |
| 15 |  | Chia-Tien Dan Lo:
The Design of a Self-Maintained Memory Module for Real-Time Systems.
IWSOC 2003: 337-342 |
| 14 |  | Witawas Srisa-an,
Chia-Tien Dan Lo,
J. Morris Chang:
Active Memory Processor: A Hardware Garbage Collector for Real-Time Java Embedded Devices.
IEEE Trans. Mob. Comput. 2(2): 89-101 (2003) |
| 2002 |
| 13 |  | Witawas Srisa-an,
Chia-Tien Dan Lo,
J. Morris Chang:
Performance Enhancements to the Active Memory System.
ICCD 2002: 249- |
| 12 |  | Chia-Tien Dan Lo,
Witawas Srisa-an,
J. Morris Chang:
A Multithreaded Concurrent Garbage Collector Parallelizing the New Instruction in Java.
IPDPS 2002 |
| 11 |  | Chia-Tien Dan Lo,
J. Morris Chang,
Ophir Frieder,
David A. Grossman:
The Object Behavior of Java Object-Oriented Database Management Systems.
ITCC 2002: 247-253 |
| 10 |  | J. Morris Chang,
Witawas Srisa-an,
Chia-Tien Dan Lo,
Edward F. Gehringer:
DMMX: Dynamic memory management extensions.
Journal of Systems and Software 63(3): 187-199 (2002) |
| 9 |  | Witawas Srisa-an,
Chia-Tien Dan Lo,
J. Morris Chang:
Object resizing and reclamation through the use of hardware bit-maps.
Microprocessors and Microsystems 25(9-10): 459-467 (2002) |
| 8 |  | Witawas Srisa-an,
Chia-Tien Dan Lo,
J. Morris Chang:
A performance perspective on the Active Memory System.
Microprocessors and Microsystems 26(9-10): 421-432 (2002) |
| 2001 |
| 7 |  | Witawas Srisa-an,
Chia-Tien Dan Lo,
J. Morris Chang:
A Performance Analysis of the Active Memory System.
ICCD 2001: 493-496 |
| 6 |  | Chia-Tien Dan Lo,
Witawas Srisa-an,
J. Morris Chang:
A study of page replacement performance in garbage collection heap.
Journal of Systems and Software 58(3): 235-245 (2001) |
| 2000 |
| 5 |  | Witawas Srisa-an,
Chia-Tien Dan Lo,
J. Morris Chang:
Scalable Hardware-Algorithm for Mark-Sweep Garbage Collection.
EUROMICRO 2000: 1274-1281 |
| 4 |  | J. Morris Chang,
Witawas Srisa-an,
Chia-Tien Dan Lo:
Architectural Support for Dynamic Memory Management.
ICCD 2000: 99-104 |
| 3 |  | Witawas Srisa-an,
Chia-Tien Dan Lo,
J. Morris Chang:
A hardware implementation of realloc function.
Integration 28(2): 173-184 (2000) |
| 1999 |
| 2 |  | Farn Wang,
Chia-Tien Dan Lo:
Procedure-Level Verification of Real-time Concurrent Systems.
Real-Time Systems 16(1): 81-114 (1999) |
| 1996 |
| 1 |  | Farn Wang,
Chia-Tien Dan Lo:
Procedure-Level Verification of Real-time Concurrent Systems.
FME 1996: 682-701 |