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| 2007 | ||
|---|---|---|
| 2 | Kuan Jen Lin, Shan Chien Fang, Shih Hsien Yang, Cheng Chia Lo: Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware. DATE 2007: 1265-1270 | |
| 2006 | ||
| 1 | Kuan Jen Lin, Chuang Hsiang Huang, Cheng Chia Lo: Design and Implementation of a Schedulable DMAC on an AMBA-Based SOPC Platform. APCCAS 2006: 279-282 | |
| 1 | Shan Chien Fang | [2] |
| 2 | Chuang Hsiang Huang | [1] |
| 3 | Kuan Jen Lin | [1] [2] |
| 4 | Shih Hsien Yang | [2] |
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