![]() | ![]() |
| 2011 | ||
|---|---|---|
| 3 | Shuming Chen, Xiaowen Chen, Yi Xu, Jianghua Wan, Jianzhuang Lu, Xiangyuan Liu, Shenggang Chen: Design and chip implementation of a heterogeneous multi-core DSP. ASP-DAC 2011: 91-92 | |
| 2007 | ||
| 2 | Shuming Chen, Xiangyuan Liu: A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM Designs. NOCS 2007: 75-82 | |
| 2006 | ||
| 1 | Xiangyuan Liu, Shuming Chen: Delay and Power Estimation Models of Low-Swing Interconnects for Design Planning. ACM Great Lakes Symposium on VLSI 2006: 91-94 | |
| 1 | Shenggang Chen | [3] |
| 2 | Shuming Chen | [1] [2] [3] |
| 3 | Xiaowen Chen | [3] |
| 4 | Jianzhuang Lu | [3] |
| 5 | Jianghua Wan | [3] |
| 6 | Yi Xu | [3] |
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