Jiayi Liu

	2012
3		Jiayi Liu: RT₂² does not imply WKL₀. J. Symb. Log. 77(2): 609-620 (2012)
	2008
2		Jiayi Liu, Sheqin Dong, Xianlong Hong, Yibo Wang, Ou He, Satoshi Goto: Symmetry constraint based on mismatch analysis for analog layout in SOI technology. ASP-DAC 2008: 772-775
	2007
1		Jiayi Liu, Sheqin Dong, Yuchun Ma, Di Long, Xianlong Hong: Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation. ASP-DAC 2007: 191-196

Coauthor Index

1	Sheqin Dong	[1] [2]
2	Satoshi Goto	[2]
3	Ou He	[2]
4	Xianlong Hong	[1] [2]
5	Di Long	[1]
6	Yuchun Ma	[1]
7	Yibo Wang	[2]

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