J. Th. van der Linden

	2002
11		M. J. Geuzebroek, J. Th. van der Linden, A. J. van de Goor: Test Point Insertion that Facilitates ATPG in Reducing Test Time and Data Volume. ITC 2002: 138-147
	2000
10		M. J. Geuzebroek, J. Th. van der Linden, A. J. van de Goor: Test point insertion for compact test sets. ITC 2000: 292-301
	1999
9		M. H. Konijnenburg, J. Th. van der Linden, A. J. van de Goor: Illegal State Space Identification for Sequential Circuit Test Generation. DATE 1999: 741-746
8		M. H. Konijnenburg, J. Th. van der Linden, A. J. van de Goor: Testability of the Philips 80C51 micro-controller. ITC 1999: 820-829
	1998
7		J. Th. van der Linden, M. H. Konijnenburg, A. J. van de Goor: Complete Search in Test Generation for Industrial Circuits with Improved Bus-Conflict Detection. Asian Test Symposium 1998: 212-
	1997
6		M. H. Konijnenburg, J. Th. van der Linden, A. J. van de Goor: Sequential Test Generation with Advanced Illegal State Search. ITC 1997: 733-742
	1996
5		J. Th. van der Linden, M. H. Konijnenburg, A. J. van de Goor: Circuit Partitioned Automatic Test Pattern Generation Constrained by Three-State Buses and Restrictors. Asian Test Symposium 1996: 29-33
4		M. H. Konijnenburg, J. Th. van der Linden, A. J. van de Goor: Accelerated Compact Test Set Generation for Three-State Circuits. ITC 1996: 29-38
	1995
3		M. H. Konijnenburg, J. Th. van der Linden, A. J. van de Goor: Compact test sets for industrial circuits. VTS 1995: 358-366
	1994
2		J. Th. van der Linden, M. H. Konijnenburg, A. J. van de Goor: Parallel Pattern Fast Fault Simulation for Three-State Circuits and Bidirectional I/O. ITC 1994: 604-613
	1993
1		M. H. Konijnenburg, J. Th. van der Linden, A. J. van de Goor: Test Pattern Generation with Restrictors. ITC 1993: 598-605

Coauthor Index

1	M. J. Geuzebroek	[10] [11]
2	A. J. van de Goor	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
3	Mario H. Konijnenburg (M. H. Konijnenburg)	[1] [2] [3] [4] [5] [6] [7] [8] [9]

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