 | 2011 |
|---|
| 4 |       | Chen-Yen Ho,
Wei-Shan Chan,
Yung-Yu Lin,
Tsung-Hsien Lin:
A Quadrature Bandpass Continuous-Time Delta-Sigma Modulator for a Tri-Mode GSM-EDGE/UMTS/DVB-T Receiver.
J. Solid-State Circuits 46(11): 2571-2582 (2011) |
| 2010 |
|---|
| 3 | | Chen-Yen Ho,
Yung-Yu Lin,
Tsung-Hsien Lin:
Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application.
ISCAS 2010: 25-28 |
| 2009 |
|---|
| 2 | | Sheng-Jui Huang,
Yung-Yu Lin:
A 1.2V 2MHz BW 0.084mm2 CT ΔΣ ADC with -97.7dBc THD and 80dB DR using low-latency DEM.
ISSCC 2009: 172-173 |
| 2005 |
|---|
| 1 | | Ping-Ying Wang,
Hsiang Ji Hsieh,
Yung-Yu Lin,
Meng-Ta Yang,
Hsueh-Wu Kao:
A phase locked loop with a mixed mode loop filter for clock/data recovery in optical disc drives.
ISCAS (5) 2005: 5007-5010 |
Data released under the ODC-BY 1.0 license — See also our legal information page