 | 2011 |
|---|
| 6 |       | Chih-Hsiang Hsu,
Yi-Min Lin,
Hsie-Chia Chang,
Chen-Yi Lee:
A 2.56 Gb/s soft RS (255, 239) decoder chip for optical communication systems.
ESSCIRC 2011: 79-82 |
| 5 | | Yi-Min Lin,
Chi-Heng Yang,
Chih-Hsiang Hsu,
Hsie-Chia Chang,
Chen-Yi Lee:
A MPCN-Based Parallel Architecture in BCH Decoders for nand Flash Memory Devices.
IEEE Trans. on Circuits and Systems 58-II(10): 682-686 (2011) |
| 2010 |
|---|
| 4 | | Yi-Min Lin,
Hsie-Chia Chang,
Chen-Yi Lee:
An improved soft BCH decoder with one extra error compensation.
ISCAS 2010: 3941-3944 |
| 3 | | Jao-Hong Cheng,
Huei-Ping Chen,
Yi-Min Lin:
A hybrid forecast marketing timing model based on probabilistic neural network, rough set and C4.5.
Expert Syst. Appl. 37(3): 1814-1820 (2010) |
| 2 | | Yi-Min Lin,
Chih-Lung Chen,
Hsie-Chia Chang,
Chen-Yi Lee:
A 26.9 K 314.5 Mb/s Soft (32400, 32208) BCH Decoder Chip for DVB-S2 System.
J. Solid-State Circuits 45(11): 2330-2340 (2010) |
| 2008 |
|---|
| 1 | | Yi-Min Lin,
Dong-Her Shih:
Deconstructing mobile commerce service with continuance intention.
IJMC 6(1): 67-87 (2008) |
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