Yen-Fu Lin

	2002
1		Chih-Wea Wang, Jing-Reng Huang, Yen-Fu Lin, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin: Test Scheduling of BISTed Memory Cores for SOC. Asian Test Symposium 2002: 356-

Coauthor Index

1	Kuo-Liang Cheng	[1]
2	Chih-Tsun Huang	[1]
3	Jing-Reng Huang	[1]
4	Youn-Long Lin	[1]
5	Chih-Wea Wang	[1]
6	Cheng-Wen Wu	[1]

Last update Sun Jun 3 16:06:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page