Tzu-Mu Lin

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1986

2 Tzu-Mu Lin, Carver Mead: A Hierarchical Timing Simulation Model. IEEE Trans. on CAD of Integrated Circuits and Systems 5(1): 188-197 (1986)

1984

1 Tzu-Mu Lin, Carver Mead: Signal Delay in General RC Networks. IEEE Trans. on CAD of Integrated Circuits and Systems 3(4): 331-349 (1984)

	1986
2		Tzu-Mu Lin, Carver Mead: A Hierarchical Timing Simulation Model. IEEE Trans. on CAD of Integrated Circuits and Systems 5(1): 188-197 (1986)
	1984
1		Tzu-Mu Lin, Carver Mead: Signal Delay in General RC Networks. IEEE Trans. on CAD of Integrated Circuits and Systems 3(4): 331-349 (1984)

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