Tsai-Ying Lin

	2007
2		Tsai-Ying Lin, Tsung-Han Lin, Hui-Hsiang Tung, Rung-Bin Lin: Double-via-driven standard cell library design. DATE 2007: 1212-1217
	2006
1		Rung-Bin Lin, Meng-Chiou Wu, Wei-Chiu Tseng, Ming-Hsine Kuo, Tsai-Ying Lin, Shr-Cheng Tsai: Design space exploration for minimizing multi-project wafer production cost. ASP-DAC 2006: 783-788

Coauthor Index

1	Ming-Hsine Kuo	[1]
2	Rung-Bin Lin	[1] [2]
3	Tsung-Han Lin	[2]
4	Shr-Cheng Tsai	[1]
5	Wei-Chiu Tseng	[1]
6	Hui-Hsiang Tung	[2]
7	Meng-Chiou Wu	[1]

Last update Sun Jun 3 16:06:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page