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| 2011 | ||
|---|---|---|
| 4 | Ting-Hao Lin, Chung-Yang (Ric) Huang: Using SAT-based Craig interpolation to enlarge clock gating functions. DAC 2011: 621-626 | |
| 2009 | ||
| 3 | Chi-An Wu, Ting-Hao Lin, Shao-Lun Huang, Chung-Yang Huang: SAT-controlled redundancy addition and removal: a novel circuit restructuring technique. ASP-DAC 2009: 191-196 | |
| 2007 | ||
| 2 | Chi-An Wu, Ting-Hao Lin, Chih-Chun Lee, Chung-Yang Huang: QuteSAT: a robust circuit-based SAT solver for complex circuit structure. DATE 2007: 1313-1318 | |
| 1 | Hsing-Chih Hung, Ting-Hao Lin, Chung-Yang Huang: QuteIP: An IP qualification framework for System on Chip. SoCC 2007: 237-240 | |
| 1 | Chung-Yang Huang (Chung-Yang (Ric) Huang) | [1] [2] [3] [4] |
| 2 | Shao-Lun Huang | [3] |
| 3 | Hsing-Chih Hung | [1] |
| 4 | Chih-Chun Lee | [2] |
| 5 | Chi-An Wu | [2] [3] |
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