Chia-Yi Lin

	2011
5		Chia-Yi Lin, Hung-Ming Chen: A Generic Multi-Dimensional Scan-Control Scheme for Test-Cost Reduction. J. Inf. Sci. Eng. 27(6): 1943-1957 (2011)
	2010
4		Chia-Yi Lin, Hung-Ming Chen: A novel two-dimensional scan-control scheme for test-cost reduction. ISQED 2010: 237-243
3		Chia-Yi Lin, Hsiu-Chuan Lin, Hung-Ming Chen: On Reducing Test Power and Test Volume by Selective Pattern Compression Schemes. IEEE Trans. VLSI Syst. 18(8): 1220-1224 (2010)
2		Chia-Yi Lin, Li-Chung Hsu, Hung-Ming Chen: On Reducing Test Power, Volume and Routing Cost by Chain Reordering and Test Compression Techniques. IEICE Transactions 93-C(3): 369-378 (2010)
	2007
1		Chia-Yi Lin, Hung-Ming Chen: A selective pattern-compression scheme for power and test-data reduction. ICCAD 2007: 520-525

Coauthor Index

1	Hung-Ming Chen	[1] [2] [3] [4] [5]
2	Li-Chung Hsu	[2]
3	Hsiu-Chuan Lin	[3]

Last update Mon Jun 4 20:40:43 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page