 | 2012 |
| 10 |  | Jie Zhang,
Albert Lin,
Nishant Patil,
Hai Wei,
Lan Wei,
H.-S. Philip Wong,
Subhasish Mitra:
Carbon Nanotube Robust Digital VLSI.
IEEE Trans. on CAD of Integrated Circuits and Systems 31(4): 453-471 (2012) |
| 2011 |
| 9 |  | Hai Wei,
Jie Zhang,
Lan Wei,
Nishant Patil,
Albert Lin,
Max M. Shulaker,
Hong-Yu Chen,
H.-S. Philip Wong,
Subhasish Mitra:
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated.
ICCAD 2011: 227-230 |
| 2010 |
| 8 |  | Jie Zhang,
Shashikanth Bobba,
Nishant Patil,
Albert Lin,
H.-S. Philip Wong,
Giovanni De Micheli,
Subhasish Mitra:
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement.
DAC 2010: 889-892 |
| 7 |  | Jie Zhang,
Nishant Patil,
Albert Lin,
H.-S. Philip Wong,
Subhasish Mitra:
Carbon nanotube circuits: Living with imperfections and variations.
DATE 2010: 1159-1164 |
| 2009 |
| 6 |  | Nishant Patil,
Albert Lin,
Jie Zhang,
H.-S. Philip Wong,
Subhasish Mitra:
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions.
DAC 2009: 304-309 |
| 2008 |
| 5 |  | Nishant Patil,
Jie Deng,
Albert Lin,
H.-S. Philip Wong,
Subhasish Mitra:
Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1725-1736 (2008) |
| 4 |  | Jie Deng,
Albert Lin,
Gordon C. Wan,
H.-S. Philip Wong:
Carbon nanotube transistor compact model for circuit design and performance optimization.
JETC 4(2): (2008) |
| 2000 |
| 3 |  | Albert Lin:
Taiwan foundry for system-in-package (SIP).
ASP-DAC 2000: 197-204 |
| 1998 |
| 2 |  | Paul R. Cohen,
Robert Schrag,
Eric K. Jones,
Adam Pease,
Albert Lin,
Barbara Starr,
David Gunning,
Murray Burke:
The DARPA High-Performance Knowledge Bases Project.
AI Magazine 19(4): 25-49 (1998) |
| 1997 |
| 1 |  | Bryan Ford,
Godmar Back,
Greg Benson,
Jay Lepreau,
Albert Lin,
Olin Shivers:
The Flux OSKit: A Substrate for Kernel and Language Research.
SOSP 1997: 38-51 |