 | 2012 |
| 13 |  | Qiang Xu,
Li Jiang,
Huiyun Li,
Bill Eklow:
Yield enhancement for 3D-stacked ICs: Recent advances and challenges.
ASP-DAC 2012: 731-737 |
| 12 |  | Huiyun Li,
Hai Yuan:
Dependability evaluation of integrated circuits at design time against laser fault injection.
Security and Communication Networks 5(5): 450-461 (2012) |
| 2011 |
| 11 |  | Keke Wu,
Huiyun Li,
XuCheng Yin,
Guoqing Xu:
Elliptic Curve Isogenies to Resist Differential Side-Channel Analysis Attacks.
CIS 2011: 939-943 |
| 10 |  | Huiyun Li,
Qi Zhang,
Hai Yuan:
Channel state information based key generation vs. side-channel analysis key information leakage.
NSS 2011: 264-268 |
| 9 |  | Huiyun Li,
Keke Wu,
Fengqi Yu:
Enhanced correlation power analysis attack against trusted systems.
Security and Communication Networks 4(1): 3-10 (2011) |
| 2010 |
| 8 |  | Huiyun Li,
Keke Wu,
Fengqi Yu,
Hai Yuan:
Evaluation Metrics of Physical Non-invasive Security.
WISTP 2010: 60-75 |
| 7 |  | Keke Wu,
Huiyun Li,
Fengqi Yu:
Retrieving Lost Efficiency of Scalar Multiplications for Resisting against Side-Channel Attacks.
JCP 5(12): 1878-1884 (2010) |
| 2009 |
| 6 |  | Keke Wu,
Dawei Li,
Huiyun Li,
Tingding Chen,
Fengqi Yu:
Partitioned Computation to Accelerate Scalar Multiplication for Elliptic Curve Cryptosystems.
ICPADS 2009: 551-555 |
| 2008 |
| 5 |  | Keke Wu,
Huiyun Li,
Bo Peng,
Fengqi Yu:
Correlation Power Analysis Attack against Synchronous Stream Ciphers.
ICYCS 2008: 2067-2072 |
| 4 |  | Huiyun Li,
Keke Wu,
Bo Peng,
Yiwei Zhang,
Xinjian Zheng,
Fengqi Yu:
Enhanced Correlation Power Analysis Attack on Smart Card.
ICYCS 2008: 2143-2148 |
| 2005 |
| 3 |  | Huiyun Li,
A. Theodore Markettos,
Simon W. Moore:
Security Evaluation Against Electromagnetic Analysis at Design Time.
CHES 2005: 280-292 |
| 2003 |
| 2 |  | Jacques J. A. Fournier,
Simon W. Moore,
Huiyun Li,
Robert D. Mullins,
George S. Taylor:
Security Evaluation of Asynchronous Circuits.
CHES 2003: 137-151 |
| 2001 |
| 1 |  | Huiyun Li,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A digital Class D amplifier design embodying a novel sampling process and pulse generator.
ISCAS (4) 2001: 826-829 |