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| 2012 | ||
|---|---|---|
| 51 | Yi-Chung Chen, Wei Zhang, Hai Li: A Look Up Table design with 3D bipolar RRAMs. ASP-DAC 2012: 73-78 | |
| 50 | Xiang Chen, Jian Zheng, Yiran Chen, Wei Zhang, Hai Li: Fine-grained dynamic voltage scaling on OLED display. ASP-DAC 2012: 807-812 | |
| 49 | Miao Hu, Hai Li, Qing Wu, Garrett S. Rose: Hardware realization of BSB recall function using memristor crossbar arrays. DAC 2012: 498-503 | |
| 48 | Xiuyuan Bi, Chao Zhang, Hai Li, Yiran Chen, Robinson E. Pino: Spintronic memristor based temperature sensor design with CMOS current reference. DATE 2012: 1301-1306 | |
| 47 | Bo Zhao, Jun Yang, Youtao Zhang, Yiran Chen, Hai Li: Architecting a common-source-line array for bipolar non-volatile memory devices. DATE 2012: 1451-1454 | |
| 46 | Yiran Chen, Hai Li, Xiaobin Wang, Wenzhong Zhu, Wei Xu, Tong Zhang: A 130 nm 1.2 V/3.3 V 16 Kb Spin-Transfer Torque Random Access Memory With Nondestructive Self-Reference Sensing Scheme. J. Solid-State Circuits 47(2): 560-573 (2012) | |
| 45 | RenBiao Wu, QiongQiong Jia, Hai Li: A novel STAP method for the detection of fast air moving targets from high speed platform. SCIENCE CHINA Information Sciences 55(6): 1259-1269 (2012) | |
| 2011 | ||
| 44 | Yiran Chen, Hai Li: Emerging sensing techniques for emerging memories. ASP-DAC 2011: 204-210 | |
| 43 | Miao Hu, Hai Li, Yiran Chen, Xiaobin Wang, Robinson E. Pino: Geometry variations analysis of TiO2 thin-film and spintronic memristors. ASP-DAC 2011: 25-30 | |
| 42 | Chun Jason Xue, Youtao Zhang, Yiran Chen, Guangyu Sun, J. Jianhua Yang, Hai Li: Emerging non-volatile memories: opportunities and challenges. CODES+ISSS 2011: 325-334 | |
| 41 | Yi-Chung Chen, Hai Li, Yiran Chen, Robinson E. Pino: 3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers. DATE 2011: 583-586 | |
| 40 | Miao Hu, Hai Li, Robinson E. Pino: Fast statistical model of TiO2 thin-film memristor and design implication. ICCAD 2011: 345-352 | |
| 39 | Yiran Chen, Weng-Fai Wong, Hai Li, Cheng-Kok Koh: Processor caches with multi-level spin-transfer torque ram cells. ISLPED 2011: 73-78 | |
| 38 | Hai Li, Zhong Xue, Kemi Cui, Stephen T. C. Wong: Diffusion tensor-based fast marching for modeling human brain connectivity network. Comp. Med. Imag. and Graph. 35(3): 167-178 (2011) | |
| 37 | Zhong Xue, Dinggang Shen, Hai Li, Stephen T. C. Wong: Tissue probability map constrained 4D clustering algorithm for increased accuracy and robustness in SerialMR brain image segmentation. IJMEI 3(3): 286-298 (2011) | |
| 2010 | ||
| 36 | Hai Li, Yingguang Li, Wei Wang, Changqing Liu: A cooperative design framework based on multi-agent for aircraft structural parts. CSCWD 2010: 306-311 | |
| 35 | Yiran Chen, Hai Li, Xiaobin Wang, Wenzhong Zhu, Wei Xu, Tong Zhang: A nondestructive self-reference scheme for Spin-Transfer Torque Random Access Memory (STT-RAM). DATE 2010: 148-153 | |
| 34 | Hai Li, Miao Hu: Compact model of memristors and its application in computing systems. DATE 2010: 673-678 | |
| 33 | Guangyu Sun, Yongsoo Joo, Yibo Chen, Dimin Niu, Yuan Xie, Yiran Chen, Hai Li: A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement. HPCA 2010: 1-12 | |
| 32 | Zhenyu Sun, Hai Li, Yiran Chen, Xiaobin Wang: Variation tolerant sensing scheme of Spin-Transfer Torque Memory for yield improvement. ICCAD 2010: 432-437 | |
| 31 | Yiran Chen, Hai Li, Xiaobin Wang, Wenzhong Zhu, Wei Xu, Tong Zhang: Combined magnetic- and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM. ISLPED 2010: 1-6 | |
| 30 | Yiran Chen, Wei Tian, Hai Li, Xiaobin Wang, Wenzhong Zhu: Scalability of PCMO-based resistive switch device in DSM technologies. ISQED 2010: 327-332 | |
| 29 | Hai Li, Zhong Xue, Mario F. Dulay, Amit Verma, Solomon Wong, Christof Karmonik, Robert G. Grossman, Stephen T. C. Wong: Distinguishing Left or Right Temporal Lobe Epilepsy from Controls Using Fractional Anisotropy Asymmetry Analysis. MIAR 2010: 219-227 | |
| 28 | Hai Li, Guisheng Liao: An Estimation Method for InSAR Interferometric Phase Based on MMSE Criterion. IEEE T. Geoscience and Remote Sensing 48(3-2): 1457-1469 (2010) | |
| 27 | Yiran Chen, Hai Li, Cheng-Kok Koh, Guangyu Sun, Jing Li, Yuan Xie, Kaushik Roy: Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance. IEEE Trans. VLSI Syst. 18(11): 1621-1624 (2010) | |
| 26 | Yiran Chen, Xiaobin Wang, Hai Li, Haiwen Xi, Yuan Yan, Wenzhong Zhu: Design Margin Exploration of Spin-Transfer Torque RAM (STT-RAM) in Scaled Technologies. IEEE Trans. VLSI Syst. 18(12): 1724-1734 (2010) | |
| 2009 | ||
| 25 | Hai Li, Yiran Chen: An overview of non-volatile memory technology and the implication for tools and architectures. DATE 2009: 731-736 | |
| 24 | Yingguang Li, Jianbang Jian, Hai Li: An Aircraft Tooling e-Manufacturing Architecture Based on Mobile Agents. DET 2009: 1217-1225 | |
| 23 | Cheng-Kok Koh, Weng-Fai Wong, Yiran Chen, Hai Li: The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies. ICCD 2009: 268-274 | |
| 22 | Hai Li, Zhong Xue, Lei Guo, Stephen T. C. Wong: Simultaneous Consideration of Spatial Deformation and Tensor Orientation in Diffusion Tensor Image Registration Using Local Fast Marching Patterns. IPMI 2009: 63-75 | |
| 21 | Hai Li, Haiwen Xi, Yiran Chen, John Stricklin, Xiaobin Wang, Tong Zhang: Thermal-Assisted Spin Transfer Torque Memory (STT-RAM) Cell Design Exploration. ISVLSI 2009: 217-222 | |
| 20 | Yiran Chen, Hai Li, Kaushik Roy, Cheng-Kok Koh: Gated Decap: Gate Leakage Control of On-Chip Decoupling Capacitors in Scaled Technologies. IEEE Trans. VLSI Syst. 17(12): 1749-1752 (2009) | |
| 19 | Cheng-Kok Koh, Weng-Fai Wong, Yiran Chen, Hai Li: Tolerating process variations in large, set-associative caches: The buddy cache. TACO 6(2): (2009) | |
| 2008 | ||
| 18 | Yiran Chen, Xiaobin Wang, Hai Li, Harry Liu, Dimitar V. Dimitrov: Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM). ISQED 2008: 684-690 | |
| 2007 | ||
| 17 | Ian W. Marshall, Mark C. Price, Hai Li, Nathan Boyd, Steve Boult: Multi-sensor Cross Correlation for Alarm Generation in a Deployed Sensor Network. EuroSSC 2007: 286-299 | |
| 16 | Weng-Fai Wong, Cheng-Kok Koh, Yiran Chen, Hai Li: VOSCH: Voltage scaled cache hierarchies. ICCD 2007: 496-503 | |
| 15 | Hai Li, Tianming Liu, Lei Guo, Stephen T. C. Wong: Deformable Registration of Dti and Spgr Images. ISBI 2007: 29-32 | |
| 14 | Yiran Chen, Hai Li, Jing Li, Cheng-Kok Koh: Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI. ISLPED 2007: 195-200 | |
| 13 | Hai Li, Mark C. Price, Jonathan Stott, Ian W. Marshall: The Development of a Wireless Sensor Network Sensing Node Utilising Adaptive Self-diagnostics. IWSOS 2007: 30-43 | |
| 2006 | ||
| 12 | Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh: SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design. ASP-DAC 2006: 158-163 | |
| 11 | Hai Li, Tianming Liu, Geoffrey Young, Lei Guo, Stephen T. C. Wong: Brain tissue segmentation based on DWI/DTI data. ISBI 2006: 57-60 | |
| 10 | Zhenfang Li, Zheng Bao, Hai Li, Guisheng Liao: Image autocoregistration and InSAR interferogram estimation using joint subspace projection. IEEE T. Geoscience and Remote Sensing 44(2): 288-297 (2006) | |
| 9 | Hai Li, Zhenfang Li, Guisheng Liao, Zheng Bao: An estimation method for InSAR interferometric phase combined with image auto-coregistration. Science in China Series F: Information Sciences 49(3): 386-396 (2006) | |
| 2005 | ||
| 8 | Yiran Chen, Hai Li, Kaushik Roy, Cheng-Kok Koh: Cascaded carry-select adder (C2SA): a new structure for low-power CSA design. ISLPED 2005: 115-118 | |
| 7 | Hai Li, Mark Fisher, Moe Razaz: Compile-Time Task Scheduling using a Fuzzy Inference System. Parallel and Distributed Computing and Networks 2005: 546-550 | |
| 6 | Hai Li, Chen-Yong Cher, Kaushik Roy, T. N. Vijaykumar: Combined circuit and architectural level variable supply-voltage scaling for low power. IEEE Trans. VLSI Syst. 13(5): 564-576 (2005) | |
| 2004 | ||
| 5 | Hai Li, Swarup Bhunia, Yiran Chen, Kaushik Roy, T. N. Vijaykumar: DCG: deterministic clock-gating for low-power microprocessor design. IEEE Trans. VLSI Syst. 12(3): 245-254 (2004) | |
| 2003 | ||
| 4 | Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, Kaushik Roy: Deterministic Clock Gating for Microprocessor Power Reduction. HPCA 2003: 113-122 | |
| 3 | Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy: VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power. MICRO 2003: 19-28 | |
| 2002 | ||
| 2 | Swarup Bhunia, Hai Li, Kaushik Roy: A High Performance IDDQ Testable Cache for Scaled CMOS Technologies. Asian Test Symposium 2002: 157- | |
| 1 | Amit Agarwal, Hai Li, Kaushik Roy: DRG-cache: a data retention gated-ground cache for low power. DAC 2002: 473-478 | |
Colors in the list of coauthors
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