Jean Davies Lesser

	1980
2		Jean Davies Lesser, John J. Shedletsky: An Experimental Delay Test Generator for LSI Logic. IEEE Trans. Computers 29(3): 235-248 (1980)
	1977
1		Barbara J. Agule, Jean Davies Lesser, Albert E. Ruehli, Peter K. Wolff Sr.: An experimental system for power/timing optimization of LSI chips. DAC 1977: 147-152

Coauthor Index

1	Barbara J. Agule	[1]
2	Albert E. Ruehli	[1]
3	John J. Shedletsky	[2]
4	Peter K. Wolff Sr.	[1]

Colors in the list of coauthors

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