 | 2011 |
| 9 |  | Hao-I Yang,
Shih-Chi Yang,
Mao-Chih Hsia,
Yung-Wei Lin,
Yi-Wei Lin,
Chien-Hen Chen,
Chi-Shin Chang,
Geng-Cing Lin,
Yin-Nien Chen,
Ching-Te Chuang,
Wei Hwang,
Shyh-Jye Jou,
Nan-Chun Lien,
Hung-Yu Li,
Kuen-Di Lee,
Wei-Chiang Shih,
Ya-Ping Wu,
Wen-Ta Lee,
Chih-Chiang Hsu:
A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control.
SoCC 2011: 197-200 |
| 2007 |
| 8 |  | Wen-Ta Lee,
Hsin-Jung Chen,
Yuh-Shyan Hwang,
Jiann-Jong Chen:
Joint Source-Channel Decoder for H.264 Coded Video Employing Fuzzy Adaptive Method.
ICME 2007: 755-758 |
| 7 |  | Yuh-Shyan Hwang,
Jeen-Fong Lin,
Cheng-Chung Huang,
Jiann-Jong Chen,
Wen-Ta Lee:
An efficient power reduction technique for flash ADC.
SoCC 2007: 43-46 |
| 2006 |
| 6 |  | Chia-Chun Tsai,
Hann-Cheng Huang,
Trong-Yen Lee,
Wen-Ta Lee,
Jan-Ou Wu:
Using Stack Reconstruction on RTL Orthogonal Scan Chain Design.
J. Inf. Sci. Eng. 22(6): 1585-1599 (2006) |
| 2005 |
| 5 |  | Chia-Chun Tsai,
Jan-Ou Wu,
Chung-Chieh Kuo,
Trong-Yen Lee,
Wen-Ta Lee:
Zero-Skew Driven for RLC Clock Tree Construction in SoC.
ICITA (1) 2005: 561-566 |
| 4 |  | Wen-Ta Lee,
San-Ho Lin,
Chia-Chun Tsai,
Trong-Yen Lee,
Yuh-Shyan Hwang:
A new low-power turbo decoder using HDA-DHDD stopping iteration.
ISCAS (2) 2005: 1040-1043 |
| 3 |  | Yuh-Shyan Hwang,
Jiann-Jong Chen,
Wen-Ta Lee:
High-order linear transformation MOSFET-C filters using operational transresistance amplifiers.
ISCAS (4) 2005: 3275-3278 |
| 2 |  | Yuh-Shyan Hwang,
Lu-Po Liao,
Chia-Chun Tsai,
Wen-Ta Lee,
Trong-Yen Lee,
Jiann-Jong Chen:
A new CCII-based pipelined analog to digital converter.
ISCAS (6) 2005: 6170-6173 |
| 2004 |
| 1 |  | Trong-Yen Lee,
Yang-Hsin Fan,
Tsung-Hsun Yang,
Chia-Chun Tsai,
Wen-Ta Lee,
Yuh-Shyan Hwang:
RCGES: Retargetable Code Generation for Embedded Systems.
ATVA 2004: 415-425 |