 | 1996 |
|---|
| 6 |       | Shi-Yu Huang,
Kuang-Chien Chen,
Kwang-Ting Cheng,
Tien-Chien Lee:
Compact Vector Generation for Accurate Power Simulation.
DAC 1996: 161-164 |
| 1993 |
|---|
| 5 | | Tien-Chien Lee,
Niraj K. Jha,
Wayne Wolf:
Behavioral Synthesis of Highly Testable Data Paths under the Non-Scan and Partial Scan Environments.
DAC 1993: 292-297 |
| 4 | | Tien-Chien Lee,
Niraj K. Jha,
Wayne Wolf:
A Conditional Resource-Sharing Method for Behavior Synthesis of Highly- Testable Data Paths.
ITC 1993: 744-753 |
| 3 | | Karl-Heinz Zimmermann,
Tien-Chien Lee,
Sun-Yuan Kung:
On partitioning and fault tolerance issues for neural array processors.
VLSI Signal Processing 6(1): 85-94 (1993) |
| 1992 |
|---|
| 2 | | Tien-Chien Lee,
Wayne Wolf,
Niraj K. Jha:
Behavioral synthesis for easy testability in data path scheduling.
ICCAD 1992: 616-619 |
| 1 |  | Tien-Chien Lee,
Wayne Wolf,
Niraj K. Jha,
John M. Acken:
Behavioral Synthesis for Easy Testability in Data Path Allocation.
ICCD 1992: 29-32 |
Data released under the ODC-BY 1.0 license — See also our legal information page