 | 2011 |
|---|
| 10 |       | Shing-Tung Lin,
Kuang-Yao Lee,
Ting-Chi Wang,
Cheng-Kok Koh,
Kai-Yuan Chao:
Simultaneous redundant via insertion and line end extension for yield optimization.
ASP-DAC 2011: 633-638 |
| 2010 |
|---|
| 9 | | Kuang-Yao Lee,
Shing-Tung Lin,
Ting-Chi Wang:
Enhanced Double Via Insertion Using Wire Bending.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(2): 171-184 (2010) |
| 8 | | Kuang-Yao Lee,
Ting-Chi Wang,
Cheng-Kok Koh,
Kai-Yuan Chao:
Optimal Double Via Insertion With On-Track Preference.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(2): 318-323 (2010) |
| 7 | | Pei-Chun Chen,
Kuang-Yao Lee,
Tsung-Ju Lee,
Yuh-Jye Lee,
Su-Yun Huang:
Multiclass support vector classification via coding and regression.
Neurocomputing 73(7-9): 1501-1512 (2010) |
| 2009 |
|---|
| 6 | | Kuang-Yao Lee,
Shing-Tung Lin,
Ting-Chi Wang:
Redundant via insertion with wire bending.
ISPD 2009: 123-130 |
| 2008 |
|---|
| 5 | | Kuang-Yao Lee,
Cheng-Kok Koh,
Ting-Chi Wang,
Kai-Yuan Chao:
Optimal post-routing redundant via insertion.
ISPD 2008: 111-117 |
| 4 | | Kuang-Yao Lee,
Cheng-Kok Koh,
Ting-Chi Wang,
Kai-Yuan Chao:
Fast and Optimal Redundant Via Insertion.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2197-2208 (2008) |
| 2007 |
|---|
| 3 | | Chung-Wei Lin,
Ming-Chao Tsai,
Kuang-Yao Lee,
Tai-Chen Chen,
Ting-Chi Wang,
Yao-Wen Chang:
Recent Research and Emerging Challenges in Physical Design for Manufacturability/Reliability.
ASP-DAC 2007: 238-243 |
| 2006 |
|---|
| 2 | | Kuang-Yao Lee,
Ting-Chi Wang:
Post-routing redundant via insertion for yield/reliability improvement.
ASP-DAC 2006: 303-308 |
| 1 | | Kuang-Yao Lee,
Ting-Chi Wang,
Kai-Yuan Chao:
Post-routing redundant via insertion and line end extension with via density consideration.
ICCAD 2006: 633-640 |
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