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| 2011 | ||
|---|---|---|
| 6 | Hyojin Choi, Jongbok Lee, Wonyong Sung: Memory access pattern-aware DRAM performance model for multi-core systems. ISPASS 2011: 66-75 | |
| 2010 | ||
| 5 | Jongbok Lee: A Superscalar Processor Model for Limited Functional Units Using Instruction Dependencies. CATA 2010: 294-299 | |
| 2009 | ||
| 4 | Jongbok Lee: Multiple Branch Prediction with Perceptrons. CATA 2009: 233-238 | |
| 2001 | ||
| 3 | Jiyang Kang, Jongbok Lee, Wonyong Sung: A Compiler-Friendly RISC-Based Digital Signal Processor Synthesis and Performance Evaluation. VLSI Signal Processing 27(3): 297-312 (2001) | |
| 1999 | ||
| 2 | Jongbok Lee, Soo-Mook Moon, Wonyong Sung: An enhanced two-level adaptive multiple branch prediction for superscalar processors. Journal of Systems Architecture 45(8): 591-602 (1999) | |
| 1997 | ||
| 1 | Jongbok Lee, Wonyong Sung, Soo-Mook Moon: An Enhanced Two-Level Adaptive Multiple Branch Prediction for Superscalar Processors. Euro-Par 1997: 1053-1060 | |
| 1 | Hyojin Choi | [6] |
| 2 | Jiyang Kang | [3] |
| 3 | Soo-Mook Moon | [1] [2] |
| 4 | Wonyong Sung | [1] [2] [3] [6] |
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